1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2016 Andes Technology Corporation
4  * Nobuhiro Lin, Andes Technology Corporation <nobuhiro@andestech.com>
5  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
6  */
7 
8 #ifndef __AE3XX_H
9 #define __AE3XX_H
10 
11 /* Hardware register bases */
12 
13 /* Static Memory Controller (SRAM) */
14 #define CONFIG_FTSMC020_BASE		0xe0400000
15 /* DMA Controller */
16 #define CONFIG_FTDMAC020_BASE		0xf0c00000
17 /* AHB-to-APB Bridge */
18 #define CONFIG_FTAPBBRG020S_01_BASE	0xf0000000
19 /* Reserved */
20 #define CONFIG_RESERVED_01_BASE		0xe0500000
21 /* Reserved */
22 #define CONFIG_RESERVED_02_BASE		0xf0800000
23 /* Reserved */
24 #define CONFIG_RESERVED_03_BASE		0xf0900000
25 /* Ethernet */
26 #define CONFIG_FTMAC100_BASE		0xe0100000
27 /* Reserved */
28 #define CONFIG_RESERVED_04_BASE		0xf1000000
29 
30 /* APB Device definitions */
31 
32 /* UART1 */
33 #define CONFIG_FTUART010_01_BASE	0xf0200000
34 /* UART2 */
35 #define CONFIG_FTUART010_02_BASE	0xf0300000
36 /* Counter/Timers */
37 #define CONFIG_FTTMR010_BASE		0xf0400000
38 /* Watchdog Timer */
39 #define CONFIG_FTWDT010_BASE		0xf0500000
40 /* Real Time Clock */
41 #define CONFIG_FTRTC010_BASE		0xf0600000
42 /* GPIO */
43 #define CONFIG_FTGPIO010_BASE		0xf0700000
44 /* I2C */
45 #define CONFIG_FTIIC010_BASE		0xf0a00000
46 
47 /* The following address was not defined in Linux */
48 
49 /* Synchronous Serial Port Controller (SSP) 01 */
50 #define CONFIG_FTSSP010_01_BASE		0xf0d00000
51 #endif	/* __AE3XX_H */
52