1From 0cafb99b57f43cf6ac2c6208718e49ad2dbe462d Mon Sep 17 00:00:00 2001 2From: Jan Schmidt <thaytan@noraisin.net> 3Date: Sun, 10 Nov 2013 00:49:52 +1100 4Subject: [PATCH] Import revision 1206 from upstream to fix PIE build. 5 6Functions MC_put_o_16_arm, MC_put_o_8_arm, MC_put_x_16_arm, MC_put_x_8_arm 7in libmpeg2/motion_comp_arm_s.S have addresses in .text, which is bad 8for shared libraries. Some environments demand that .text actually be 9read-only all the time, yet MC_put_o_16_arm etc require that the addresses 10be modified by the dynamic linking mechanism (dlopen, LoadLibrary, etc.) 11Even in those environments which permit the dynamic linker to modify the 12.text segment, the runtime cost of doing the relocation can be noticeable. 13 14This commit rewrites the linkage, discarding the tables of addresses 15in favor of tables of offsets. All transfers are local within each individual 16function, so there can be no interference by processing that occurs 17after assembly, such as link-time re-ordering (even of individual functions.) 18 19Patch by John Reiser <jreiser@bitwagon.com> 20Signed-off-by: Khem Raj <raj.khem@gmail.com> 21Upstream-Status: Backport [https://code.videolan.org/videolan/libmpeg2/commit/946bf4b518aacc224f845e73708f99e394744499] 22--- 23 libmpeg2/motion_comp_arm_s.S | 70 +++++++++++++++++------------------- 24 1 file changed, 33 insertions(+), 37 deletions(-) 25 26diff --git a/libmpeg2/motion_comp_arm_s.S b/libmpeg2/motion_comp_arm_s.S 27index c921f7c..82143f8 100644 28--- a/libmpeg2/motion_comp_arm_s.S 29+++ b/libmpeg2/motion_comp_arm_s.S 30@@ -30,9 +30,13 @@ MC_put_o_16_arm: 31 pld [r1] 32 stmfd sp!, {r4-r11, lr} @ R14 is also called LR 33 and r4, r1, #3 34- adr r5, MC_put_o_16_arm_align_jt 35- add r5, r5, r4, lsl #2 36- ldr pc, [r5] 37+ ldrb r4, [pc, r4] 38+ add pc, pc, r4, lsl #2 39+ .byte (MC_put_o_16_arm_align0 - 0f)>>2 40+ .byte (MC_put_o_16_arm_align1 - 0f)>>2 41+ .byte (MC_put_o_16_arm_align2 - 0f)>>2 42+ .byte (MC_put_o_16_arm_align3 - 0f)>>2 43+0: 44 45 MC_put_o_16_arm_align0: 46 ldmia r1, {r4-r7} 47@@ -76,11 +80,6 @@ MC_put_o_16_arm_align3: 48 1: PROC(24) 49 bne 1b 50 ldmfd sp!, {r4-r11, pc} @@ update PC with LR content. 51-MC_put_o_16_arm_align_jt: 52- .word MC_put_o_16_arm_align0 53- .word MC_put_o_16_arm_align1 54- .word MC_put_o_16_arm_align2 55- .word MC_put_o_16_arm_align3 56 57 @ ---------------------------------------------------------------- 58 .align 59@@ -91,9 +90,14 @@ MC_put_o_8_arm: 60 pld [r1] 61 stmfd sp!, {r4-r10, lr} @ R14 is also called LR 62 and r4, r1, #3 63- adr r5, MC_put_o_8_arm_align_jt 64- add r5, r5, r4, lsl #2 65- ldr pc, [r5] 66+ ldrb r4, [pc, r4] 67+ add pc, pc, r4, lsl #2 68+ .byte (MC_put_o_8_arm_align0 - 0f)>>2 69+ .byte (MC_put_o_8_arm_align1 - 0f)>>2 70+ .byte (MC_put_o_8_arm_align2 - 0f)>>2 71+ .byte (MC_put_o_8_arm_align3 - 0f)>>2 72+0: 73+ 74 MC_put_o_8_arm_align0: 75 ldmia r1, {r4-r5} 76 add r1, r1, r2 77@@ -135,12 +139,6 @@ MC_put_o_8_arm_align3: 78 bne 1b 79 ldmfd sp!, {r4-r10, pc} @@ update PC with LR content. 80 81-MC_put_o_8_arm_align_jt: 82- .word MC_put_o_8_arm_align0 83- .word MC_put_o_8_arm_align1 84- .word MC_put_o_8_arm_align2 85- .word MC_put_o_8_arm_align3 86- 87 @ ---------------------------------------------------------------- 88 .macro AVG_PW rW1, rW2 89 mov \rW2, \rW2, lsl #24 90@@ -160,12 +158,17 @@ MC_put_x_16_arm: 91 @@ void func(uint8_t * dest, const uint8_t * ref, int stride, int height) 92 pld [r1] 93 stmfd sp!, {r4-r11,lr} @ R14 is also called LR 94+ ldr r11, 0f 95 and r4, r1, #3 96- adr r5, MC_put_x_16_arm_align_jt 97- ldr r11, [r5] 98 mvn r12, r11 99- add r5, r5, r4, lsl #2 100- ldr pc, [r5, #4] 101+ ldrb r4, [pc, r4] 102+ add pc, pc, r4, lsl #2 103+ .byte (MC_put_x_16_arm_align0 - 0f)>>2 104+ .byte (MC_put_x_16_arm_align1 - 0f)>>2 105+ .byte (MC_put_x_16_arm_align2 - 0f)>>2 106+ .byte (MC_put_x_16_arm_align3 - 0f)>>2 107+0: 108+ .word 0x01010101 109 110 .macro ADJ_ALIGN_QW shift, R0, R1, R2, R3, R4 111 mov \R0, \R0, lsr #(\shift) 112@@ -238,12 +241,6 @@ MC_put_x_16_arm_align3: 113 add r0, r0, r2 114 bne 1b 115 ldmfd sp!, {r4-r11,pc} @@ update PC with LR content. 116-MC_put_x_16_arm_align_jt: 117- .word 0x01010101 118- .word MC_put_x_16_arm_align0 119- .word MC_put_x_16_arm_align1 120- .word MC_put_x_16_arm_align2 121- .word MC_put_x_16_arm_align3 122 123 @ ---------------------------------------------------------------- 124 .align 125@@ -253,12 +250,17 @@ MC_put_x_8_arm: 126 @@ void func(uint8_t * dest, const uint8_t * ref, int stride, int height) 127 pld [r1] 128 stmfd sp!, {r4-r11,lr} @ R14 is also called LR 129+ ldr r11, 0f 130 and r4, r1, #3 131- adr r5, MC_put_x_8_arm_align_jt 132- ldr r11, [r5] 133 mvn r12, r11 134- add r5, r5, r4, lsl #2 135- ldr pc, [r5, #4] 136+ ldrb r4, [pc, r4] 137+ add pc, pc, r4, lsl #2 138+ .byte (MC_put_x_8_arm_align0 - 0f)>>2 139+ .byte (MC_put_x_8_arm_align1 - 0f)>>2 140+ .byte (MC_put_x_8_arm_align2 - 0f)>>2 141+ .byte (MC_put_x_8_arm_align3 - 0f)>>2 142+0: 143+ .word 0x01010101 144 145 .macro ADJ_ALIGN_DW shift, R0, R1, R2 146 mov \R0, \R0, lsr #(\shift) 147@@ -319,9 +321,3 @@ MC_put_x_8_arm_align3: 148 add r0, r0, r2 149 bne 1b 150 ldmfd sp!, {r4-r11,pc} @@ update PC with LR content. 151-MC_put_x_8_arm_align_jt: 152- .word 0x01010101 153- .word MC_put_x_8_arm_align0 154- .word MC_put_x_8_arm_align1 155- .word MC_put_x_8_arm_align2 156- .word MC_put_x_8_arm_align3 157