/openbmc/u-boot/drivers/power/pmic/ |
H A D | Kconfig | 58 a (family of) single-output regulators that supports 59 transitioning between two different output voltages based on
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/openbmc/linux/Documentation/networking/ |
H A D | nf_flowtable.rst | 21 transmitted to the output netdevice via neigh_xmit(), hence, packets bypass the 47 | input | | output |
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/openbmc/linux/Documentation/kbuild/ |
H A D | kconfig-macro-language.rst | 110 to a subshell for execution. The standard output of the command is then read 111 and returned as the value of the function. Every newline in the output is
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/openbmc/linux/drivers/net/can/softing/ |
H A D | softing_fw.c | 523 iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]); in softing_startstop() 563 iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]); in softing_startstop()
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/openbmc/linux/Documentation/dev-tools/ |
H A D | gcov.rst | 229 echo "Usage: $0 <ksrc directory> <kobj directory> <output.tar.gz>" >&2 261 echo "Usage: $0 <output.tar.gz>" >&2
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/openbmc/openbmc-tools/ipkdbg/ |
H A D | README.md | 154 final `ipkdbg` script. The output script can then be freely copied between 158 binaries under `bin/` to ensure that the build for your output `ipkdbg` script
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/openbmc/phosphor-fan-presence/control/ |
H A D | gen-fan-zone-defs.py | 1012 with open(output_file, "w") as output: 1013 output.write(tmpl.render(zones=zone_config, mgr_data=manager_config))
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/openbmc/openbmc/poky/documentation/migration-guides/ |
H A D | migration-1.7.rst | 19 instead of setting it. In other words, to enable graphical output for 219 ":ref:`dev-manual/build-quality:maintaining build output quality`"
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H A D | release-notes-4.3.1.rst | 41 - dev-manual: wic: update "wic list images" output 95 - patchtest: reduce checksum test output length
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/openbmc/qemu/docs/devel/ |
H A D | decodetree.rst | 234 and may be specialized. When the *rt* field is zero, the output 239 The output from the generator might look like::
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/openbmc/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun9i-a80-optimus.dts | 472 clock-output-names = "4M_adda"; 481 clock-output-names = "cko1_rtc",
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H A D | sun8i-a83t-tbs-a711.dts | 280 clock-output-names = "4M_adda"; 289 clock-output-names = "cko1_rtc",
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H A D | sun8i-a83t-cubietruck-plus.dts | 257 clock-output-names = "4M_adda"; 266 clock-output-names = "cko1_rtc",
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/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | stericsson,ab8500.yaml | 402 description: The voltage for the TV output regulator, incidentally 411 description: The LDO regulator for the audio codec output
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3568-roc-pc.dts | 40 clock-output-names = "gmac0_clkin"; 47 clock-output-names = "gmac1_clkin";
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H A D | rk3399-sapphire.dtsi | 26 clock-output-names = "clkin_gmac"; 233 clock-output-names = "xin32k", "rk808-clkout2";
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H A D | rk3326-odroid-go.dtsi | 117 /* led-1 is wired directly to output of always-on regulator */ 269 clock-output-names = "rk808-clkout1", "xin32k";
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H A D | rk3399-kobol-helios64.dts | 56 clock-output-names = "clkin_gmac"; 312 clock-output-names = "xin32k", "rk808-clkout2";
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H A D | rk3399-leez-p710.dts | 30 clock-output-names = "clkin_gmac"; 187 clock-output-names = "xin32k", "rk808-clkout2";
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/openbmc/linux/Documentation/gpu/ |
H A D | drm-internals.rst | 10 setting up command buffers, creating an initial output configuration, 17 event handling, memory management, output management, framebuffer
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/openbmc/linux/Documentation/driver-api/gpio/ |
H A D | board.rst | 221 output. Moreover, open drain and open source pins are excluded from fast bitmap 222 output processing.
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx7-mba7.dtsi | 234 ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>; 639 fsl,ext-reset-output;
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn-evk.dtsi | 339 fsl,sai-mclk-direction-output; 430 fsl,ext-reset-output;
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H A D | imx8mq-evk.dts | 225 output-high; 487 fsl,ext-reset-output;
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/openbmc/linux/arch/arm64/boot/dts/renesas/ |
H A D | draak.dtsi | 481 * Even though the LVDS1 output is not connected, the encoder must be 482 * enabled to supply a pixel clock to the DU for the DPAD output when
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