| /openbmc/u-boot/doc/ |
| H A D | README.ti-secure | 59 XIP_X-LOADER - Generates a single stage u-boot for NOR/QSPI XiP
89 XIP_X-LOADER - Generates a single stage u-boot for
163 The SPL image is responsible for loading the next stage boot loader,
|
| H A D | README.drivers.eth | 38 So the call graph at this stage would look something like:
175 So the call graph at this stage would look something like:
|
| H A D | README.bcm7xxx | 5 a third stage bootloader loaded by Broadcom's BOLT bootloader.
|
| H A D | README.dfutftp | 57 This is the preferable way of using this command in the early boot stage
|
| /openbmc/linux/drivers/staging/media/ipu3/ |
| H A D | ipu3-css.c | 683 const int stage = 0; in imgu_css_pipeline_init() local
879 isp_stage = css_pipe->xmem_isp_stage_ptrs[pipe][stage].vaddr; in imgu_css_pipeline_init()
894 sp_stage = css_pipe->xmem_sp_stage_ptrs[pipe][stage].vaddr; in imgu_css_pipeline_init()
906 sp_stage->num = stage; in imgu_css_pipeline_init()
997 css_pipe->xmem_isp_stage_ptrs[pipe][stage].daddr; in imgu_css_pipeline_init()
1018 sp_group->pipe[pipe].sp_stage_addr[stage] = in imgu_css_pipeline_init()
1019 css_pipe->xmem_sp_stage_ptrs[pipe][stage].daddr; in imgu_css_pipeline_init()
2106 const int stage = 0; in imgu_css_set_parameters() local
2250 param_set->mem_map.isp_mem_param[stage][m] = map->daddr; in imgu_css_set_parameters()
|
| /openbmc/linux/Documentation/usb/ |
| H A D | iuu_phoenix.rst | 13 This driver is still in beta stage, so bugs can
|
| /openbmc/linux/tools/testing/selftests/arm64/signal/ |
| H A D | README | 53 successfully progressed up to the stage of triggering the fake sigreturn
|
| /openbmc/linux/drivers/video/fbdev/ |
| H A D | imsttfb.c | 438 __u32 clk_m, clk_n, x, stage, spilled; in setclkMHz() local
441 stage = spilled = 0; in setclkMHz()
443 switch (stage) { in setclkMHz()
456 stage = 1; in setclkMHz()
458 stage = 0; in setclkMHz()
|
| /openbmc/u-boot/common/ |
| H A D | Kconfig | 10 record elapsed time in a particular stage using bootstage_start()
44 This shows how long it took U-Boot to go through each stage of the
59 int "Number of boot stage records to store"
66 int "Number of boot stage records to store for SPL"
387 output. Normally there is very little output at this early stage,
787 through system resets and are the first stage bootloader, then
859 through to the next stage of the boot.
|
| /openbmc/linux/drivers/gpu/drm/ci/ |
| H A D | gitlab-ci.yml | 216 stage: git-archive
239 stage: sanity
|
| /openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | Kconfig | 273 which is loaded during boot stage, and then remains resident in RAM
285 which is loaded during boot stage, and then remains resident in RAM
287 stage instead of the RAM version of U-Boot. Once PPA is initialized,
|
| /openbmc/linux/drivers/usb/renesas_usbhs/ |
| H A D | mod_gadget.c | 485 int stage = usbhs_status_get_ctrl_stage(irq_state); in usbhsg_irq_ctrl_stage() local
488 dev_dbg(dev, "stage = %d\n", stage); in usbhsg_irq_ctrl_stage()
499 switch (stage) { in usbhsg_irq_ctrl_stage()
|
| /openbmc/linux/drivers/ufs/host/ |
| H A D | ufs-mediatek.c | 1050 enum ufs_notify_change_status stage, in ufs_mtk_pwr_change_notify() argument
1056 switch (stage) { in ufs_mtk_pwr_change_notify()
1151 enum ufs_notify_change_status stage) in ufs_mtk_link_startup_notify() argument
1155 switch (stage) { in ufs_mtk_link_startup_notify()
|
| /openbmc/openbmc/poky/meta/classes-recipe/ |
| H A D | overlayfs-etc.bbclass | 9 # In order to have /etc directory in overlayfs a special handling at early boot stage is required
|
| /openbmc/linux/include/linux/ |
| H A D | suspend.h | 423 int (*begin)(pm_message_t stage);
|
| /openbmc/linux/drivers/staging/media/atomisp/pci/ |
| H A D | sh_css.c | 1281 struct ia_css_pipeline_stage *stage; in start_pipe() local
1283 stage = me->pipeline.stages; in start_pipe()
1284 if (stage) { in start_pipe()
1285 me->pipeline.current_stage = stage; in start_pipe()
1286 start_binary(me, stage->binary); in start_pipe()
3596 struct ia_css_pipeline_stage *stage; in ia_css_pipe_enqueue_buffer() local
3725 for (stage = pipeline->stages; stage; stage = stage->next) { in ia_css_pipe_enqueue_buffer()
3730 if (stage->binary && stage->binary->info && in ia_css_pipe_enqueue_buffer()
7498 struct ia_css_pipeline_stage *stage; in ia_css_pipeline_uses_params() local
7505 for (stage = me->stages; stage; stage = stage->next) in ia_css_pipeline_uses_params()
[all …]
|
| /openbmc/qemu/qapi/ |
| H A D | migration.json | 449 # the ram bulk stage, after that, it will be disabled and only
761 # @cpu-throttle-tailslow: Make CPU throttling slower at tail stage At
762 # the tail stage of throttling, the Guest is very sensitive to CPU
764 # usually at tail stage. If this parameter is true, we will
771 # be excessive at tail stage. The default value is false. (Since
950 # @cpu-throttle-tailslow: Make CPU throttling slower at tail stage At
951 # the tail stage of throttling, the Guest is very sensitive to CPU
953 # usually at tail stage. If this parameter is true, we will
960 # be excessive at tail stage. The default value is false. (Since
1176 # @cpu-throttle-tailslow: Make CPU throttling slower at tail stage At
[all …]
|
| /openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192c/ |
| H A D | phy_common.c | 778 u8 channel, u8 *stage, u8 *step, in _rtl92c_phy_sw_chnl_step_by_step() argument
819 switch (*stage) { in _rtl92c_phy_sw_chnl_step_by_step()
831 *stage); in _rtl92c_phy_sw_chnl_step_by_step()
836 if ((*stage) == 2) { in _rtl92c_phy_sw_chnl_step_by_step()
839 (*stage)++; in _rtl92c_phy_sw_chnl_step_by_step()
|
| /openbmc/linux/drivers/media/pci/ddbridge/ |
| H A D | ddbridge.h | 370 int ddb_exit_ddbridge(int stage, int error);
|
| /openbmc/linux/Documentation/nvme/ |
| H A D | feature-and-quirk-policy.rst | 56 later stage.
|
| /openbmc/u-boot/drivers/usb/musb-new/ |
| H A D | musb_gadget_ep0.c | 39 static char *decode_ep0stage(u8 stage) in decode_ep0stage() argument
41 switch (stage) { in decode_ep0stage()
|
| /openbmc/linux/drivers/usb/musb/ |
| H A D | musb_gadget_ep0.c | 33 static char *decode_ep0stage(u8 stage) in decode_ep0stage() argument
35 switch (stage) { in decode_ep0stage()
|
| /openbmc/linux/Documentation/block/ |
| H A D | blk-mq.rst | 57 at the hardware queue, a second stage queue where the hardware has direct access
119 There is no reordering at this stage, and each software queue has a set of
|
| /openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192se/ |
| H A D | phy.c | 311 u8 channel, u8 *stage, u8 *step, u32 *delay) in _rtl92s_phy_sw_chnl_step_by_step() argument
349 switch (*stage) { in _rtl92s_phy_sw_chnl_step_by_step()
364 if ((*stage) == 2) { in _rtl92s_phy_sw_chnl_step_by_step()
367 (*stage)++; in _rtl92s_phy_sw_chnl_step_by_step()
|
| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | lpc1850-cgu.txt | 12 stages. Each output stage provides an independent clock source and
|