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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dallwinner,sun6i-a31-usb-phy.yaml46 - description: USB OTG reset
47 - description: USB Host 1 Controller reset
48 - description: USB Host 2 Controller reset
50 reset-names:
84 - reset-names
92 #include <dt-bindings/reset/sun6i-a31-ccu.h>
112 reset-names = "usb0_reset",
H A Dallwinner,sun8i-a83t-usb-phy.yaml48 - description: USB OTG reset
49 - description: USB Host 1 Controller reset
50 - description: USB Host 2 Controller reset
52 reset-names:
86 - reset-names
94 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
116 reset-names = "usb0_reset",
H A Dallwinner,sun8i-r40-usb-phy.yaml48 - description: USB OTG reset
49 - description: USB Host 1 Controller reset
50 - description: USB Host 2 Controller reset
52 reset-names:
86 - reset-names
94 #include <dt-bindings/reset/sun8i-r40-ccu.h>
116 reset-names = "usb0_reset",
H A Dallwinner,sun5i-a13-usb-phy.yaml39 - description: USB OTG reset
40 - description: USB Host 1 Controller reset
42 reset-names:
72 - reset-names
80 #include <dt-bindings/reset/sun5i-ccu.h>
90 reset-names = "usb0_reset", "usb1_reset";
H A Dqcom,usb-hs-phy.yaml24 reset-names:
33 reset-names:
62 reset-names: true
90 - reset-names
98 #reset-cells = <1>;
107 reset-names = "phy", "por";
/openbmc/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_common.c247 int reset; in mpc5200_psc_ac97_gpio_reset() local
255 reset = PSC1_RESET; /* AC97_1_RES */ in mpc5200_psc_ac97_gpio_reset()
261 reset = PSC2_RESET; /* AC97_2_RES */ in mpc5200_psc_ac97_gpio_reset()
279 setbits8(&wkup_gpio->wkup_gpioe, reset); in mpc5200_psc_ac97_gpio_reset()
282 setbits8(&wkup_gpio->wkup_ddr, reset); in mpc5200_psc_ac97_gpio_reset()
287 clrbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
293 setbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3568-nanopi-r5s.dts67 snps,reset-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>;
68 snps,reset-active-low;
70 snps,reset-delays-us = <0 15000 50000>;
87 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
98 reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
107 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
114 eth_phy0_reset_pin: eth-phy0-reset-pin {
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dmediatek,mtk-wdt.yaml54 description: Disable sending output reset signal
57 mediatek,reset-by-toprgu:
58 description: The Top Reset Generation Unit (TOPRGU) generates reset signals
60 reset by TOPRGU once system resets.
63 '#reset-cells':
86 #reset-cells = <1>;
/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Drockchip,rk3288-crypto.yaml37 reset-names:
59 reset-names:
78 reset-names:
97 reset-names:
110 - reset-names
126 reset-names = "crypto-rst";
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dsamsung,ld9040.yaml23 reset-gpios: true
35 reset-delay:
37 description: delay after reset sequence [ms]
53 - reset-gpios
70 reset-gpios = <&gpy4 5 0>;
75 reset-delay = <10>;
H A Dsamsung,s6e8aa0.yaml20 reset-gpios: true
33 reset-delay:
34 description: delay after reset sequence [ms]
60 - reset-gpios
76 reset-gpios = <&gpy4 5 0>;
78 reset-delay = <100>;
/openbmc/qemu/scripts/coccinelle/
H A Dcpu-reset.cocci1 // Convert targets using the old CPUState reset to DeviceState reset
7 // --sp-file scripts/coccinelle/cpu-reset.cocci \
13 // * the parent reset field in the target CPU class is 'parent_reset'
14 // * no reset function already has a 'dev' local
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dnvidia,tegra20-apbdma.txt10 - resets : Must contain an entry for each entry in reset-names.
11 See ../reset/reset.txt for details.
12 - reset-names : Must include the following entries:
42 reset-names = "dma";
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-clearfog-gtr.dtsi28 18 - Topaz switch reset (active low)
29 19 - 1512 phy reset
30 20 - 1512 phy reset (eth2, optional)
40 33 - CON4 mini PCIe reset
42 35 - CON3 mini PCIe reset
47 44 - CON2 mini PCIe reset
51 48 - PSE reset
230 reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
235 reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
444 poe-reset {
[all …]
/openbmc/phosphor-state-manager/service_files/
H A Dphosphor-reset-host-recovery@.service3 After=obmc-host-reset@%i.target
4 Wants=obmc-host-reset-running@%i.target
5 After=obmc-host-reset-running@%i.target
16 ExecStart=/usr/bin/phosphor-host-reset-recovery
/openbmc/u-boot/drivers/reset/aspeed/
H A DMakefile1 obj-$(CONFIG_RESET_AST2400) += reset-ast2400.o
2 obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o
3 obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o
/openbmc/u-boot/arch/arm/cpu/armv7m/
H A Dstart.S9 .globl reset
10 .type reset, %function
11 reset: label
/openbmc/linux/drivers/input/keyboard/
H A Dsunkbd.c66 volatile s8 reset; member
80 if (sunkbd->reset <= -1) { in sunkbd_interrupt()
85 sunkbd->reset = data; in sunkbd_interrupt()
101 sunkbd->reset = -1; in sunkbd_interrupt()
178 sunkbd->reset = -2; in sunkbd_initialize()
180 wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >= 0, HZ); in sunkbd_initialize()
181 if (sunkbd->reset < 0) in sunkbd_initialize()
184 sunkbd->type = sunkbd->reset; in sunkbd_initialize()
235 sunkbd->reset >= 0 || !sunkbd->enabled, in sunkbd_reinit()
238 if (sunkbd->reset >= 0 && sunkbd->enabled) in sunkbd_reinit()
/openbmc/linux/drivers/phy/amlogic/
H A Dphy-meson8b-usb2.c129 struct reset_control *reset; member
146 if (!IS_ERR_OR_NULL(priv->reset)) { in phy_meson8b_usb2_power_on()
147 ret = reset_control_reset(priv->reset); in phy_meson8b_usb2_power_on()
157 reset_control_rearm(priv->reset); in phy_meson8b_usb2_power_on()
165 reset_control_rearm(priv->reset); in phy_meson8b_usb2_power_on()
204 reset_control_rearm(priv->reset); in phy_meson8b_usb2_power_on()
224 reset_control_rearm(priv->reset); in phy_meson8b_usb2_power_off()
271 priv->reset = devm_reset_control_get_optional_shared(&pdev->dev, NULL); in phy_meson8b_usb2_probe()
272 if (IS_ERR(priv->reset)) in phy_meson8b_usb2_probe()
273 return dev_err_probe(&pdev->dev, PTR_ERR(priv->reset), in phy_meson8b_usb2_probe()
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dfsl,fec.yaml194 # the phy's reset binding, again described by ethernet-phy.yaml.
196 phy-reset-gpios:
199 Should specify the gpio for phy reset.
201 phy-reset-duration:
210 phy-reset-active-high:
214 If present then the reset sequence using the GPIO specified in the
215 "phy-reset-gpios" property is reversed (H=reset state, L=operation state).
217 phy-reset-post-delay:
221 Post reset delay in milliseconds. If present then a delay of phy-reset-post-delay
244 phy-reset-gpios = <&gpio2 14 0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp-prtwd3.dts69 reset-assert-us = <500>;
70 reset-deassert-us = <1000>;
80 reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
81 reset-assert-us = <20>;
82 reset-deassert-us = <2000>;
234 reset-assert-us = <10000>;
235 reset-deassert-us = <1000>;
465 /* SJA1105Q switch reset */
468 /* phy3/rgmii_phy reset */
484 /* phy0/usbeth_phy reset */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml137 reset-gpios:
142 reset line is used.
145 reset-names:
244 reset-gpios: false
248 - reset-names
291 reset-names: false
371 reset-names = "mcm";
487 #include <dt-bindings/reset/mt7621-reset.h>
553 #include <dt-bindings/reset/mt7621-reset.h>
642 #include <dt-bindings/reset/mt7621-reset.h>
[all …]
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dreset_manager_gen5.c19 void socfpga_per_reset(u32 reset, int set) in socfpga_per_reset() argument
22 u32 rstmgr_bank = RSTMGR_BANK(reset); in socfpga_per_reset()
46 setbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
48 clrbits_le32(reg, 1 << RSTMGR_RESET(reset)); in socfpga_per_reset()
/openbmc/linux/drivers/reset/starfive/
H A DMakefile2 obj-$(CONFIG_RESET_STARFIVE_JH71X0) += reset-starfive-jh71x0.o
4 obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o
5 obj-$(CONFIG_RESET_STARFIVE_JH7110) += reset-starfive-jh7110.o
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dintel-gw-pcie.yaml56 reset-gpios:
66 reset-assert-ms:
68 Delay after asserting reset to the PCIe device.
81 - reset-gpios
114 reset-assert-ms = <500>;
115 reset-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;

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