| /openbmc/qemu/hw/arm/ |
| H A D | xlnx-zynqmp.c | 506 qdev_prop_set_bit(DEVICE(&s->gic), "has-security-extensions", s->secure); in xlnx_zynqmp_realize()
507 qdev_prop_set_bit(DEVICE(&s->gic), in xlnx_zynqmp_realize()
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| H A D | mps2.c | 245 qdev_prop_set_bit(armv7m, "enable-bitband", true); in mps2_common_init()
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| H A D | vexpress.c | 522 qdev_prop_set_bit(dev, "big-endian", false); in ve_pflash_cfi01_register()
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| H A D | mps2-tz.c | 494 qdev_prop_set_bit(DEVICE(fpgaio), "has-switches", mmc->fpgaio_has_switches); in make_fpgaio()
495 qdev_prop_set_bit(DEVICE(fpgaio), "has-dbgctrl", mmc->fpgaio_has_dbgctrl); in make_fpgaio()
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| H A D | virt.c | 754 qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure); in create_gic()
780 qdev_prop_set_bit(vms->gic, "has-lpi", true); in create_gic()
785 qdev_prop_set_bit(vms->gic, "has-virtualization-extensions", in create_gic()
1134 qdev_prop_set_bit(dev, "big-endian", false); in virt_flash_create1()
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| H A D | stellaris.c | 1071 qdev_prop_set_bit(nvic, "enable-bitband", true); in stellaris_init()
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| /openbmc/qemu/hw/misc/macio/ |
| H A D | macio.c | 320 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); in macio_newworld_realize()
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| /openbmc/qemu/hw/isa/ |
| H A D | piix.c | 369 qdev_prop_set_bit(DEVICE(&d->pm), "smm-enabled", d->smm_enabled); in pci_piix_realize()
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| /openbmc/qemu/hw/pci-bridge/ |
| H A D | pci_expander_bridge.c | 358 qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false); in pxb_dev_realize_common()
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| /openbmc/qemu/hw/openrisc/ |
| H A D | virt.c | 455 qdev_prop_set_bit(dev, "force-legacy", false); in openrisc_virt_virtio_init()
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| /openbmc/qemu/hw/xtensa/ |
| H A D | xtfpga.c | 180 qdev_prop_set_bit(dev, "big-endian", be); in xtfpga_flash_init()
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| /openbmc/qemu/hw/i386/ |
| H A D | pc_q35.c | 251 qdev_prop_set_bit(DEVICE(lpc), "smm-enabled", in pc_q35_init()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | designware.c | 752 qdev_prop_set_bit(DEVICE(root), "multifunction", false); in designware_pcie_host_init()
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| H A D | aspeed_pcie.c | 235 qdev_prop_set_bit(DEVICE(root), "multifunction", false); in aspeed_pcie_rc_init()
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| H A D | q35.c | 213 qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false); in q35_host_initfn()
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| /openbmc/qemu/hw/nvram/ |
| H A D | fw_cfg.c | 1149 qdev_prop_set_bit(dev, "dma_enabled", false); in fw_cfg_init_io_dma()
1189 qdev_prop_set_bit(dev, "dma_enabled", false); in fw_cfg_init_mem_wide()
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| /openbmc/qemu/hw/sparc64/ |
| H A D | sun4u.c | 707 qdev_prop_set_bit(dev, "dma_enabled", false); in sun4uv_init()
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| /openbmc/qemu/hw/block/ |
| H A D | pflash_cfi01.c | 985 qdev_prop_set_bit(dev, "big-endian", !!be); in type_init()
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| /openbmc/qemu/hw/m68k/ |
| H A D | next-cube.c | 941 qdev_prop_set_bit(dev, "bit_swap", true); in next_escc_init()
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| /openbmc/qemu/hw/s390x/ |
| H A D | s390-virtio-ccw.c | 218 qdev_prop_set_bit(dev, "enforce_bios", enforce_bios); in s390_init_ipl_dev()
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| /openbmc/qemu/hw/mips/ |
| H A D | malta.c | 1234 qdev_prop_set_bit(dev, "cpu-little-endian", !TARGET_BIG_ENDIAN); in mips_malta_init()
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| /openbmc/qemu/hw/core/ |
| H A D | qdev-properties.c | 807 void qdev_prop_set_bit(DeviceState *dev, const char *name, bool value) in qdev_prop_set_bit() function
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| /openbmc/qemu/hw/loongarch/ |
| H A D | virt.c | 64 qdev_prop_set_bit(dev, "big-endian", false); in virt_flash_create()
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| /openbmc/qemu/hw/ppc/ |
| H A D | e500.c | 1153 qdev_prop_set_bit(dev, "big-endian", true); in ppce500_init()
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| /openbmc/qemu/hw/sparc/ |
| H A D | sun4m.c | 1063 qdev_prop_set_bit(dev, "dma_enabled", false); in sun4m_hw_init()
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