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Searched refs:psw (Results 26 – 50 of 123) sorted by relevance

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/openbmc/linux/arch/s390/kernel/
H A Dtraps.c42 address = regs->psw.addr; in get_trap_ip()
239 regs->psw.mask |= PSW_ASC_HOME; in space_switch_exception()
249 switch (report_bug(regs->psw.addr - (regs->int_code >> 16), regs)) { in monitor_event_exception()
329 __arch_local_irq_ssm(regs->psw.mask & ~PSW_MASK_PER); in __do_pgm_check()
335 if (!irqs_disabled_flags(regs->psw.mask)) in __do_pgm_check()
337 __arch_local_irq_ssm(regs->psw.mask & ~PSW_MASK_PER); in __do_pgm_check()
H A Drelocate_kernel.S63 la %r4,load_psw-.base(%r13) # load psw-address into the register
64 o %r3,4(%r4) # or load address into psw
66 mvc 0(8,%r0),0(%r4) # copy psw to absolute address 0
H A Dptrace.c103 regs->psw.mask &= ~PSW_MASK_PER; in update_cr_regs()
106 regs->psw.mask |= PSW_MASK_PER; in update_cr_regs()
203 if (addr == offsetof(struct user, regs.psw.mask)) { in __peek_user()
354 *(addr_t *)((addr_t) &regs->psw + addr) = data; in __poke_user()
584 tmp = (__u32)(regs->psw.mask >> 32); in __peek_user_compat()
589 tmp = (__u32) regs->psw.addr | in __peek_user_compat()
590 (__u32)(regs->psw.mask & PSW_MASK_BA); in __peek_user_compat()
702 regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | in __poke_user_compat()
703 (regs->psw.mask & PSW_MASK_BA) | in __poke_user_compat()
707 regs->psw.addr = (__u64) tmp & PSW32_ADDR_INSN; in __poke_user_compat()
[all …]
H A Dperf_regs.c29 return regs->psw.mask; in perf_reg_value()
31 return regs->psw.addr; in perf_reg_value()
H A Dearly.c183 psw_t psw; in setup_lowcore_early() local
185 psw.addr = (unsigned long)early_pgm_check_handler; in setup_lowcore_early()
186 psw.mask = PSW_KERNEL_BITS; in setup_lowcore_early()
187 S390_lowcore.program_new_psw = psw; in setup_lowcore_early()
H A Dunwind_bc.c49 READ_ONCE_NOCHECK(regs->psw.mask) & PSW_MASK_PSTATE; in is_final_pt_regs()
92 ip = READ_ONCE_NOCHECK(regs->psw.addr); in unwind_next_frame()
140 ip = regs->psw.addr; in __unwind_start()
H A Dsyscall.c125 regs->psw.addr = current->restart_block.arch_data; in do_syscall()
154 regs->psw = S390_lowcore.svc_old_psw; in __do_syscall()
/openbmc/linux/arch/s390/include/asm/
H A Dptrace.h117 psw_t psw; member
212 #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
213 #define instruction_pointer(regs) ((regs)->psw.addr)
225 regs->psw.addr = val; in instruction_pointer_set()
H A Dftrace.h77 return fregs->regs.psw.addr; in ftrace_regs_get_instruction_pointer()
84 fregs->regs.psw.addr = ip; in ftrace_regs_set_instruction_pointer()
/openbmc/qemu/linux-user/include/host/s390x/
H A Dhost-signal.h19 return uc->uc_mcontext.psw.addr; in host_signal_pc()
24 uc->uc_mcontext.psw.addr = pc; in host_signal_set_pc()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dnv10.c65 nv10_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) in nv10_sw_new() argument
67 return nvkm_sw_new_(&nv10_sw, device, type, inst, psw); in nv10_sw_new()
H A Dnv04.c136 nv04_sw_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) in nv04_sw_new() argument
138 return nvkm_sw_new_(&nv04_sw, device, type, inst, psw); in nv04_sw_new()
H A Dbase.c99 enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw) in nvkm_sw_new_() argument
103 if (!(sw = *psw = kzalloc(sizeof(*sw), GFP_KERNEL))) in nvkm_sw_new_()
/openbmc/qemu/pc-bios/s390-ccw/
H A Djump2ipl.c19 void write_reset_psw(uint64_t psw) in write_reset_psw() argument
21 *reset_psw = psw; in write_reset_psw()
/openbmc/qemu/target/s390x/
H A Ds390x-internal.h123 return ((env->psw.mask & PSW_MASK_64) ? (1 << 7) : 0) | in get_per_atmid()
125 ((env->psw.mask & PSW_MASK_32) ? (1 << 5) : 0) | in get_per_atmid()
126 ((env->psw.mask & PSW_MASK_DAT) ? (1 << 4) : 0) | in get_per_atmid()
127 ((env->psw.mask & PSW_ASC_SECONDARY) ? (1 << 3) : 0) | in get_per_atmid()
128 ((env->psw.mask & PSW_ASC_ACCREG) ? (1 << 2) : 0); in get_per_atmid()
133 if (!(env->psw.mask & PSW_MASK_64)) { in wrap_address()
134 if (!(env->psw.mask & PSW_MASK_32)) { in wrap_address()
H A Dcpu.h81 PSW psw; member
389 if (!(env->psw.mask & PSW_MASK_DAT)) { in cpu_mmu_index()
394 if ((env->psw.mask & PSW_MASK_ASC) == PSW_ASC_HOME) { in cpu_mmu_index()
400 switch (env->psw.mask & PSW_MASK_ASC) { in cpu_mmu_index()
422 if (env->psw.addr & 1) { in cpu_get_tb_cpu_state()
430 *pc = env->psw.addr; in cpu_get_tb_cpu_state()
432 *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; in cpu_get_tb_cpu_state()
501 env->psw.mask &= ~(3ull << 44); in setcc()
502 env->psw.mask |= (cc & 3) << 44; in setcc()
H A Dinterrupt.c148 if (!(env->psw.mask & PSW_MASK_MCHECK)) { in s390_cpu_has_mcck_int()
166 if (!(env->psw.mask & PSW_MASK_EXT)) { in s390_cpu_has_ext_int()
208 if (!(env->psw.mask & PSW_MASK_IO)) { in s390_cpu_has_io_int()
/openbmc/qemu/docs/devel/
H A Ds390-dasd-ipl.rst17 information: ``[psw][read ccw][tic ccw]``. When the machine executes the Read
40 location ``0x0`` thereby overwriting the IPL1 psw and channel program. This is ok
41 as long as the data placed in location ``0x0`` contains a psw whose instruction
48 The psw that was loaded into memory location ``0x0`` as part of the ipl process
50 psw's instruction address will point to the location in memory where we want
51 to start executing the operating system. This psw is loaded (via LPSW
63 procedure then loads the psw from ``0x0``.
107 So now IPL1's psw is at ``0x0`` and IPL1's channel program is at ``0x08``.
132 Now the operating system code is loaded somewhere in guest memory and the psw
/openbmc/qemu/tests/tcg/i386/
H A Dtest-i386-fprem.c150 static void psw(uint16_t sw) in psw() function
189 psw(sw); in do_fprem()
198 psw(sw); in do_fprem()
220 psw(sw); in do_fprem_stack_underflow()
/openbmc/qemu/target/rx/
H A Dop_helper.c32 static void _set_psw(CPURXState *env, uint32_t psw, uint32_t rte) in _set_psw() argument
36 rx_cpu_unpack_psw(env, psw, rte); in _set_psw()
49 void helper_set_psw(CPURXState *env, uint32_t psw) in helper_set_psw() argument
51 _set_psw(env, psw, 0); in helper_set_psw()
54 void helper_set_psw_rte(CPURXState *env, uint32_t psw) in helper_set_psw_rte() argument
56 _set_psw(env, psw, 1); in helper_set_psw_rte()
/openbmc/qemu/tests/tcg/tricore/c/
H A Dcrt0-tc2x.S75 mfcr %d0,$psw
78 mtcr $psw,%d0
85 mfcr %d0,$psw
87 mtcr $psw,%d0
109 mfcr %d0,$psw
111 mtcr $psw,%d0
/openbmc/qemu/target/tricore/
H A Dop_helper.c2418 (*psw)++; in cdc_increment()
2422 int count = *psw & mask; in cdc_increment()
2424 (*psw)--; in cdc_increment()
2438 int count = *psw & mask; in cdc_decrement()
2442 (*psw)--; in cdc_decrement()
2457 int count = *psw & mask; in cdc_zero()
2548 target_ulong psw; in helper_call() local
2550 psw = psw_read(env); in helper_call()
2564 psw |= MASK_PSW_CDE; in helper_call()
2603 psw_write(env, psw); in helper_call()
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/openbmc/linux/arch/s390/kvm/
H A Dgaccess.h63 static inline unsigned long _kvm_s390_logical_to_effective(psw_t *psw, in _kvm_s390_logical_to_effective() argument
66 if (psw_bits(*psw).eaba == PSW_BITS_AMODE_64BIT) in _kvm_s390_logical_to_effective()
68 if (psw_bits(*psw).eaba == PSW_BITS_AMODE_31BIT) in _kvm_s390_logical_to_effective()
/openbmc/qemu/target/s390x/tcg/
H A Dcrypto_helper.c176 if (!(env->psw.mask & PSW_MASK_64)) { in cpacf_sha512()
178 message_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24; in cpacf_sha512()
254 if (!(env->psw.mask & PSW_MASK_64)) { in fill_buf_random()
256 buf_reg_len = (env->psw.mask & PSW_MASK_32) ? 32 : 24; in fill_buf_random()
/openbmc/linux/arch/s390/boot/
H A Dstartup.c286 psw_t psw; in startup_kernel() local
375 psw.addr = vmlinux.entry; in startup_kernel()
376 psw.mask = PSW_KERNEL_BITS; in startup_kernel()
377 __load_psw(psw); in startup_kernel()

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