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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dactions,s900-pinctrl.txt3 This binding describes the pin controller found in the S900 SoC.
9 the pin controller.
10 - clocks: phandle of the clock feeding the pin controller
13 pin-controller pins.
14 - #gpio-cells: Should be two. The first cell is the gpio pin number
29 phrase "pin configuration node".
34 mux function to select on those group(s), and various pin configuration
45 Similarly, a pin subnode that describes a pullup parameter implies no
48 Pinmux functions are available only for the pin groups while pinconf
49 parameters are available for both pin groups and individual pins.
[all …]
H A Dpinctrl-vt8500.txt3 These SoCs contain a combined Pinmux/GPIO module. Each pin may operate as
13 - #gpio-cells : Should be two. The first cell is the pin number and the
21 phrase "pin configuration node".
23 Each pin configuration node lists the pin(s) to which it applies, and one or
24 more of the mux functions to select on those pin(s), and pull-up/down
31 - wm,pins: An array of cells. Each cell contains the ID of a pin.
34 - wm,function: Integer, containing the function to mux to the pin(s):
39 - wm,pull: Integer, representing the pull-down/up to apply to the pin(s):
H A Dbrcm,iproc-gpio.txt31 Must be two. The first cell is the GPIO pin number (within the
32 controller's pin space) and the second cell is used for the following:
47 Specifies the mapping between gpio controller and pin-controllers pins.
49 1. Phandle of pin-controller.
50 2. GPIO base pin offset.
51 3 Pin-control base pin offset.
52 4. number of gpio pins which are linearly mapped from pin base.
57 The list of pins (within the controller's own pin space) that properties
58 in the node apply to. Pin names are "gpio-<pin>"
61 Disable pin bias
H A Dlantiq,pinctrl-falcon.txt10 phrase "pin configuration node".
12 Lantiq's pin configuration nodes act as a container for an arbitrary number of
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those group(s), and two pin configuration parameters:
22 other words, a subnode that lists a mux function but no pin configuration
23 parameters implies no information about any pin configuration parameters.
24 Similarly, a pin subnode that describes a pullup parameter implies no
47 Definition of pin configurations:
50 - lantiq,pins : An array of strings. Each string contains the name of a pin.
54 - lantiq,pull: Integer, representing the pull-down/up to apply to the pin.
/openbmc/linux/drivers/pinctrl/freescale/
H A Dpinctrl-scu.c141 unsigned int *pin_id, struct imx_pin *pin, in imx_pinctrl_parse_pin_scu() argument
145 struct imx_pin_scu *pin_scu = &pin->conf.scu; in imx_pinctrl_parse_pin_scu()
148 pin->pin = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_scu()
149 *pin_id = pin->pin; in imx_pinctrl_parse_pin_scu()
154 dev_dbg(ipctl->dev, "%s: 0x%x 0x%08lx", info->pins[pin->pin].name, in imx_pinctrl_parse_pin_scu()
H A Dpinctrl-imx.h52 unsigned int pin; member
103 unsigned int *pin_id, struct imx_pin *pin,
114 #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) argument
133 unsigned int *pin_id, struct imx_pin *pin,
H A Dpinctrl-mxs.h16 #define MXS_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) argument
17 #define PINID(bank, pin) ((bank) * 32 + (pin)) argument
/openbmc/linux/drivers/leds/blink/
H A Dleds-lgm-sso.c27 #define GET_FREQ_OFFSET(pin, src) (((pin) * 6) + ((src) * 2)) argument
112 u32 pin; member
158 if (pin < LED_GRP0_PIN_MAX) in sso_led_pin_to_group()
160 else if (pin < LED_GRP1_PIN_MAX) in sso_led_pin_to_group()
179 return pin - LED_GRP1_PIN_MAX; in sso_led_pin_blink_off()
181 return pin - LED_GRP0_PIN_MAX; in sso_led_pin_blink_off()
259 1 << desc->pin); in sso_led_brightness_set()
317 1 << led->desc.pin); in sso_led_blink_set()
333 1 << desc->pin); in sso_led_hw_cfg()
338 1 << desc->pin); in sso_led_hw_cfg()
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dpinmux.c112 int pin, const char *owner, in pin_request()
119 desc = pin_desc_get(pctldev, pin); in pin_request()
123 pin); in pin_request()
128 pin, desc->name, owner); in pin_request()
159 pin); in pin_request()
194 pin, owner, status); in pin_request()
242 ops->free(pctldev, pin); in pin_free()
267 unsigned pin, unsigned gpio) in pinmux_request_gpio() argument
308 unsigned pin, bool input) in pinmux_gpio_direction() argument
589 unsigned i, pin; in pinmux_pins_show() local
[all …]
H A Dpinctrl-bm1880.c1008 #define BM1880_PINCONF(pin, idx) ((!((pin + 1) & 1) << 4) + idx) argument
1009 #define BM1880_PINCONF_PULLCTRL(pin) BM1880_PINCONF(pin, 0) argument
1010 #define BM1880_PINCONF_PULLUP(pin) BM1880_PINCONF(pin, 1) argument
1011 #define BM1880_PINCONF_PULLDOWN(pin) BM1880_PINCONF(pin, 2) argument
1012 #define BM1880_PINCONF_DRV(pin) BM1880_PINCONF(pin, 6) argument
1013 #define BM1880_PINCONF_SCHMITT(pin) BM1880_PINCONF(pin, 9) argument
1014 #define BM1880_PINCONF_SLEW(pin) BM1880_PINCONF(pin, 10) argument
1152 unsigned int pin, in bm1880_pinconf_cfg_get() argument
1161 offset = (pin >> 1) << 2; in bm1880_pinconf_cfg_get()
1204 unsigned int pin, in bm1880_pinconf_cfg_set() argument
[all …]
/openbmc/linux/drivers/leds/
H A Dleds-bcm6328.c72 unsigned long pin; member
104 if (pin < 8) in bcm6328_pin2shift()
115 shift = bcm6328_pin2shift(led->pin); in bcm6328_led_mode()
137 led->blink_leds[0] &= ~BIT(led->pin); in bcm6328_led_set()
138 led->blink_leds[1] &= ~BIT(led->pin); in bcm6328_led_set()
203 led->blink_leds[0] |= BIT(led->pin); in bcm6328_blink_set()
206 led->blink_leds[1] &= ~BIT(led->pin); in bcm6328_blink_set()
227 led->blink_leds[0] &= ~BIT(led->pin); in bcm6328_blink_set()
230 led->blink_leds[1] |= BIT(led->pin); in bcm6328_blink_set()
342 led->pin = reg; in bcm6328_led()
[all …]
/openbmc/linux/arch/powerpc/platforms/8xx/
H A Dadder875.c22 int port, pin, flags; member
69 const struct cpm_pin *pin = &adder875_pins[i]; in init_ioports() local
70 cpm1_set_pin(pin->port, pin->pin, pin->flags); in init_ioports()
/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_display.c550 int pin, reset_pin; in sunxi_lcdc_panel_enable() local
557 if (pin >= 0) { in sunxi_lcdc_panel_enable()
563 if (pin >= 0) { in sunxi_lcdc_panel_enable()
577 if (pin >= 0) { in sunxi_lcdc_panel_enable()
588 int pin; in sunxi_lcdc_backlight_enable() local
597 if (pin >= 0) in sunxi_lcdc_backlight_enable()
611 if (pin >= 0) in sunxi_lcdc_backlight_enable()
655 for (pin = SUNXI_GPD(18); pin <= SUNXI_GPD(27); pin++) {
657 for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++) {
873 int pin; local
[all …]
/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-lpass-lpi.c41 static int lpi_gpio_read(struct lpi_pinctrl *state, unsigned int pin, in lpi_gpio_read() argument
97 int i, pin = g->pin; in lpi_gpio_set_mux() local
108 val = lpi_gpio_read(pctrl, pin, LPI_GPIO_CFG_REG); in lpi_gpio_set_mux()
132 lpi_gpio_write(pctrl, pin, LPI_GPIO_CFG_REG, val); in lpi_gpio_set_mux()
146 unsigned int pin, unsigned long *config) in lpi_config_get() argument
155 ctl_reg = lpi_gpio_read(state, pin, LPI_GPIO_CFG_REG); in lpi_config_get()
289 return lpi_config_set(state->ctrl, pin, &config, 1); in lpi_gpio_direction_input()
293 unsigned int pin, int val) in lpi_gpio_direction_output() argument
300 return lpi_config_set(state->ctrl, pin, &config, 1); in lpi_gpio_direction_output()
307 return lpi_gpio_read(state, pin, LPI_GPIO_VALUE_REG) & in lpi_gpio_get()
[all …]
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpinctrl-rza2.c59 #define RZA2_PFS(port, pin) (0x0200 + ((port) * 8) + (pin)) /* Fnct 8-bit */ argument
84 mask16 = RZA2_PDR_MASK << (pin * 2); in rza2_set_pin_function()
90 reg8 &= ~BIT(pin); in rza2_set_pin_function()
106 reg8 |= BIT(pin); in rza2_set_pin_function()
114 u8 pin = RZA2_PIN_ID_TO_PIN(offset); in rza2_pin_to_gpio() local
119 mask16 = RZA2_PDR_MASK << (pin * 2); in rza2_pin_to_gpio()
134 u8 pin = RZA2_PIN_ID_TO_PIN(offset); in rza2_chip_get_direction() local
169 u8 pin = RZA2_PIN_ID_TO_PIN(offset); in rza2_chip_get() local
179 u8 pin = RZA2_PIN_ID_TO_PIN(offset); in rza2_chip_set() local
185 new_value |= BIT(pin); in rza2_chip_set()
[all …]
/openbmc/u-boot/drivers/pinctrl/aspeed/
H A DKconfig2 bool "Aspeed AST2400 pin control driver"
6 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
11 bool "Aspeed AST2500 pin control driver"
15 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
20 bool "Aspeed AST2600 pin control driver"
24 Support pin multiplexing control on Aspeed ast2600 SoC. The driver uses
/openbmc/linux/drivers/pinctrl/aspeed/
H A DKconfig12 bool "Aspeed G4 SoC pin control"
16 Say Y here to enable pin controller support for Aspeed's 4th
20 bool "Aspeed G5 SoC pin control"
24 Say Y here to enable pin controller support for Aspeed's 5th
28 bool "Aspeed G6 SoC pin control"
32 Say Y here to enable pin controller support for Aspeed's 6th
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dled.h7 void rtl8821ae_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin);
8 void rtl8812ae_sw_led_on(struct ieee80211_hw *hw, enum rtl_led_pin pin);
9 void rtl8821ae_sw_led_off(struct ieee80211_hw *hw, enum rtl_led_pin pin);
10 void rtl8812ae_sw_led_off(struct ieee80211_hw *hw, enum rtl_led_pin pin);
/openbmc/linux/drivers/pinctrl/cirrus/
H A Dpinctrl-cs42l43.c304 cs42l43_pin_pins[pin].name, ma); in cs42l43_pin_set_drv_str()
313 cs42l43_pin_pins[pin].name, ma); in cs42l43_pin_set_drv_str()
322 if (pin >= CS42L43_NUM_GPIOS) in cs42l43_pin_get_db()
338 if (pin >= CS42L43_NUM_GPIOS) in cs42l43_pin_set_db()
342 str_on_off(us), cs42l43_pin_pins[pin].name); in cs42l43_pin_set_db()
345 CS42L43_GPIO1_DEGLITCH_BYP_MASK << pin, in cs42l43_pin_set_db()
346 !!us << pin); in cs42l43_pin_set_db()
350 unsigned int pin, unsigned long *config) in cs42l43_pin_config_get() argument
358 ret = cs42l43_pin_get_drv_str(priv, pin); in cs42l43_pin_config_get()
363 ret = cs42l43_pin_get_db(priv, pin); in cs42l43_pin_config_get()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dsemtech,sx9324.yaml41 semtech,ph0-pin:
57 semtech,ph1-pin:
59 description: Same as ph0-pin for phase 1.
65 semtech,ph2-pin:
67 description: Same as ph0-pin for phase 2.
73 semtech,ph3-pin:
75 description: Same as ph0-pin for phase 3.
189 semtech,ph0-pin = <1 2 3>;
190 semtech,ph1-pin = <3 2 1>;
191 semtech,ph2-pin = <1 2 3>;
[all …]
/openbmc/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm6368.c385 int i, pin; in bcm6368_pinctrl_set_mux() local
391 pin = pg->pins[i]; in bcm6368_pinctrl_set_mux()
392 if (pin < BCM63XX_BANK_GPIOS) in bcm6368_pinctrl_set_mux()
393 mask |= BIT(pin); in bcm6368_pinctrl_set_mux()
399 pin = pg->pins[0]; in bcm6368_pinctrl_set_mux()
401 if (bcm6368_pins[pin].drv_data) in bcm6368_pinctrl_set_mux()
405 regmap_update_bits(pc->regs, BCM6368_MODE_REG, BIT(pin), in bcm6368_pinctrl_set_mux()
406 BIT(pin)); in bcm6368_pinctrl_set_mux()
409 for (pin = 0; pin < pg->npins; pin++) { in bcm6368_pinctrl_set_mux()
411 int hw_gpio = bcm6368_pins[pin].number; in bcm6368_pinctrl_set_mux()
[all …]
/openbmc/linux/drivers/pinctrl/spear/
H A DKconfig13 This enables pin control drivers for SPEAr Platform
21 bool "ST Microelectronics SPEAr300 SoC pin controller driver"
26 bool "ST Microelectronics SPEAr310 SoC pin controller driver"
32 bool "ST Microelectronics SPEAr320 SoC pin controller driver"
38 bool "ST Microelectronics SPEAr1310 SoC pin controller driver"
44 bool "ST Microelectronics SPEAr1340 SoC pin controller driver"
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Domap-usb-host.txt21 "ohci-phy-6pin-datse0",
22 "ohci-phy-6pin-dpdm",
23 "ohci-phy-3pin-datse0",
24 "ohci-phy-4pin-dpdm",
25 "ohci-tll-6pin-datse0",
26 "ohci-tll-6pin-dpdm",
27 "ohci-tll-3pin-datse0",
28 "ohci-tll-4pin-dpdm",
29 "ohci-tll-2pin-datse0",
30 "ohci-tll-2pin-dpdm",
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-netgear-rn2120.dts243 sata1_led_pin: sata1-led-pin {
248 sata2_led_pin: sata2-led-pin {
253 sata3_led_pin: sata3-led-pin {
258 sata4_led_pin: sata4-led-pin {
263 sata1_power_pin: sata1-power-pin {
268 sata2_power_pin: sata2-power-pin {
283 sata1_pres_pin: sata1-pres-pin {
288 sata2_pres_pin: sata2-pres-pin {
293 sata3_pres_pin: sata3-pres-pin {
298 sata4_pres_pin: sata4-pres-pin {
[all …]
/openbmc/linux/arch/powerpc/sysdev/
H A Dcpm2.c318 void __init cpm2_set_pin(int port, int pin, int flags) in cpm2_set_pin() argument
323 pin = 1 << (31 - pin); in cpm2_set_pin()
326 setbits32(&iop[port].dir, pin); in cpm2_set_pin()
328 clrbits32(&iop[port].dir, pin); in cpm2_set_pin()
331 setbits32(&iop[port].par, pin); in cpm2_set_pin()
333 clrbits32(&iop[port].par, pin); in cpm2_set_pin()
336 setbits32(&iop[port].sor, pin); in cpm2_set_pin()
338 clrbits32(&iop[port].sor, pin); in cpm2_set_pin()
341 setbits32(&iop[port].odr, pin); in cpm2_set_pin()
343 clrbits32(&iop[port].odr, pin); in cpm2_set_pin()

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