/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | brcm,kona-ccu.txt | 16 "brcm,bcm11351-root-ccu" 32 compatible = "brcm,bcm11351-slave-ccu"; 59 "brcm,bcm11351-root-ccu" 60 "brcm,bcm11351-aon-ccu" 61 "brcm,bcm11351-hub-ccu" 62 "brcm,bcm11351-master-ccu" 63 "brcm,bcm11351-slave-ccu" 105 "brcm,bcm21664-root-ccu" 106 "brcm,bcm21664-aon-ccu" 107 "brcm,bcm21664-master-ccu" [all …]
|
H A D | allwinner,sun8i-a83t-de2-clk.yaml | 64 #include <dt-bindings/clock/sun8i-h3-ccu.h> 65 #include <dt-bindings/reset/sun8i-h3-ccu.h> 70 clocks = <&ccu CLK_BUS_DE>, 71 <&ccu CLK_DE>; 74 resets = <&ccu RST_BUS_DE>;
|
/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | allwinner,sun8i-a83t-mipi-csi2.yaml | 87 #include <dt-bindings/clock/sun8i-a83t-ccu.h> 88 #include <dt-bindings/reset/sun8i-a83t-ccu.h> 94 clocks = <&ccu CLK_BUS_CSI>, 95 <&ccu CLK_CSI_SCLK>, 96 <&ccu CLK_MIPI_CSI>, 97 <&ccu CLK_CSI_MISC>; 99 resets = <&ccu RST_BUS_CSI>;
|
H A D | allwinner,sun6i-a31-isp.yaml | 74 #include <dt-bindings/clock/sun8i-v3s-ccu.h> 75 #include <dt-bindings/reset/sun8i-v3s-ccu.h> 81 clocks = <&ccu CLK_BUS_CSI>, 82 <&ccu CLK_CSI1_SCLK>, 83 <&ccu CLK_DRAM_CSI>; 85 resets = <&ccu RST_BUS_CSI>;
|
H A D | allwinner,sun8i-h3-deinterlace.yaml | 67 #include <dt-bindings/clock/sun8i-h3-ccu.h> 68 #include <dt-bindings/reset/sun8i-h3-ccu.h> 73 clocks = <&ccu CLK_BUS_DEINTERLACE>, 74 <&ccu CLK_DEINTERLACE>, 75 <&ccu CLK_DRAM_DEINTERLACE>; 77 resets = <&ccu RST_BUS_DEINTERLACE>;
|
H A D | allwinner,sun50i-h6-vpu-g2.yaml | 56 #include <dt-bindings/clock/sun50i-h6-ccu.h> 57 #include <dt-bindings/reset/sun50i-h6-ccu.h> 63 clocks = <&ccu CLK_BUS_VP9>, <&ccu CLK_VP9>; 65 resets = <&ccu RST_BUS_VP9>;
|
H A D | allwinner,sun4i-a10-video-engine.yaml | 80 #include <dt-bindings/clock/sun7i-a20-ccu.h> 81 #include <dt-bindings/reset/sun4i-a10-ccu.h> 87 clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, 88 <&ccu CLK_DRAM_VE>; 90 resets = <&ccu RST_VE>;
|
H A D | allwinner,sun6i-a31-csi.yaml | 105 #include <dt-bindings/clock/sun8i-v3s-ccu.h> 106 #include <dt-bindings/reset/sun8i-v3s-ccu.h> 112 clocks = <&ccu CLK_BUS_CSI>, 113 <&ccu CLK_CSI1_SCLK>, 114 <&ccu CLK_DRAM_CSI>; 118 resets = <&ccu RST_BUS_CSI>;
|
/openbmc/linux/Documentation/devicetree/bindings/crypto/ |
H A D | allwinner,sun8i-ss.yaml | 50 #include <dt-bindings/clock/sun8i-a83t-ccu.h> 51 #include <dt-bindings/reset/sun8i-a83t-ccu.h> 57 resets = <&ccu RST_BUS_SS>; 58 clocks = <&ccu CLK_BUS_SS>, <&ccu CLK_SS>;
|
H A D | allwinner,sun8i-ce.yaml | 91 #include <dt-bindings/clock/sun50i-a64-ccu.h> 92 #include <dt-bindings/reset/sun50i-a64-ccu.h> 98 clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; 100 resets = <&ccu RST_BUS_CE>;
|
/openbmc/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun8i-v3.dtsi | 17 clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>; 23 resets = <&ccu RST_BUS_I2S0>; 29 &ccu { 30 compatible = "allwinner,sun8i-v3-ccu";
|
H A D | sun5i-gr8.dtsi | 47 #include <dt-bindings/clock/sun5i-ccu.h> 49 #include <dt-bindings/reset/sun5i-ccu.h> 61 clocks = <&ccu CLK_HOSC>; 71 clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>; 84 clocks = <&ccu CLK_APB0_I2S>, <&ccu CLK_I2S>; 94 &ccu { 95 compatible = "nextthing,gr8-ccu";
|
/openbmc/linux/Documentation/devicetree/bindings/ata/ |
H A D | allwinner,sun8i-r40-ahci.yaml | 53 #include <dt-bindings/clock/sun8i-r40-ccu.h> 54 #include <dt-bindings/reset/sun8i-r40-ccu.h> 60 clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>; 61 resets = <&ccu RST_BUS_SATA>;
|
/openbmc/linux/arch/riscv/boot/dts/allwinner/ |
H A D | sun20i-d1.dtsi | 14 clocks = <&ccu CLK_BUS_LRADC>; 15 resets = <&ccu RST_BUS_LRADC>; 24 clocks = <&ccu CLK_BUS_I2S0>, 25 <&ccu CLK_I2S0>; 27 resets = <&ccu RST_BUS_I2S0>;
|
/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | allwinner,sun50i-h6-dmic.yaml | 72 #include <dt-bindings/clock/sun50i-h6-ccu.h> 73 #include <dt-bindings/reset/sun50i-h6-ccu.h> 80 clocks = <&ccu CLK_BUS_DMIC>, <&ccu CLK_DMIC>; 84 resets = <&ccu RST_BUS_DMIC>;
|
/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | allwinner,sun8i-a83t-emac.yaml | 200 resets = <&ccu 12>; 202 clocks = <&ccu 27>; 230 clocks = <&ccu 67>; 231 resets = <&ccu 39>; 251 resets = <&ccu 12>; 253 clocks = <&ccu 27>; 280 clocks = <&ccu 67>; 281 resets = <&ccu 39>; 304 resets = <&ccu 13>; 306 clocks = <&ccu 27>;
|
/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | allwinner,sun8i-a23-usb-phy.yaml | 84 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> 85 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> 92 clocks = <&ccu CLK_USB_PHY0>, 93 <&ccu CLK_USB_PHY1>; 96 resets = <&ccu RST_USB_PHY0>, 97 <&ccu RST_USB_PHY1>;
|
H A D | allwinner,sun50i-a64-usb-phy.yaml | 86 #include <dt-bindings/clock/sun50i-a64-ccu.h> 87 #include <dt-bindings/reset/sun50i-a64-ccu.h> 98 clocks = <&ccu CLK_USB_PHY0>, 99 <&ccu CLK_USB_PHY1>; 102 resets = <&ccu RST_USB_PHY0>, 103 <&ccu RST_USB_PHY1>;
|
H A D | allwinner,sun50i-h6-usb-phy.yaml | 84 #include <dt-bindings/clock/sun50i-h6-ccu.h> 85 #include <dt-bindings/reset/sun50i-h6-ccu.h> 96 clocks = <&ccu CLK_USB_PHY0>, 97 <&ccu CLK_USB_PHY3>; 100 resets = <&ccu RST_USB_PHY0>, 101 <&ccu RST_USB_PHY3>;
|
H A D | allwinner,sun50i-h6-usb3-phy.yaml | 41 #include <dt-bindings/clock/sun50i-h6-ccu.h> 42 #include <dt-bindings/reset/sun50i-h6-ccu.h> 46 clocks = <&ccu CLK_USB_PHY1>; 47 resets = <&ccu RST_USB_PHY1>;
|
H A D | allwinner,sun4i-a10-usb-phy.yaml | 88 #include <dt-bindings/clock/sun4i-a10-ccu.h> 89 #include <dt-bindings/reset/sun4i-a10-ccu.h> 96 clocks = <&ccu CLK_USB_PHY>; 98 resets = <&ccu RST_USB_PHY0>, 99 <&ccu RST_USB_PHY1>, 100 <&ccu RST_USB_PHY2>;
|
/openbmc/linux/Documentation/devicetree/bindings/display/ |
H A D | allwinner,sun6i-a31-drc.yaml | 81 #include <dt-bindings/clock/sun6i-a31-ccu.h> 82 #include <dt-bindings/reset/sun6i-a31-ccu.h> 88 clocks = <&ccu CLK_AHB1_DRC0>, <&ccu CLK_IEP_DRC0>, 89 <&ccu CLK_DRAM_DRC0>; 92 resets = <&ccu RST_AHB1_DRC0>;
|
H A D | allwinner,sun4i-a10-display-frontend.yaml | 89 #include <dt-bindings/clock/sun4i-a10-ccu.h> 90 #include <dt-bindings/reset/sun4i-a10-ccu.h> 96 clocks = <&ccu CLK_AHB_DE_FE0>, <&ccu CLK_DE_FE0>, 97 <&ccu CLK_DRAM_DE_FE0>; 100 resets = <&ccu RST_DE_FE0>;
|
/openbmc/u-boot/arch/arm/dts/ |
H A D | sun5i-gr8.dtsi | 47 #include <dt-bindings/clock/sun5i-ccu.h> 49 #include <dt-bindings/reset/sun5i-ccu.h> 61 clocks = <&ccu CLK_HOSC>; 71 clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>; 84 clocks = <&ccu CLK_APB0_I2S>, <&ccu CLK_I2S>; 94 &ccu { 95 compatible = "nextthing,gr8-ccu";
|
/openbmc/linux/Documentation/devicetree/bindings/hwlock/ |
H A D | allwinner,sun6i-a31-hwspinlock.yaml | 43 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h> 44 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h> 49 clocks = <&ccu CLK_BUS_SPINLOCK>; 50 resets = <&ccu RST_BUS_SPINLOCK>;
|