Searched refs:cascaded (Results 51 – 60 of 60) sorted by relevance
123
258 most often cascaded off a parent interrupt controller, and in some special419 is a typical example of a chained cascaded interrupt handler using665 is cascaded, set the handler to handle_level_irq() and/or handle_edge_irq()
561 /* This GIC on the board is cascaded off the DevChip GIC */
700 * This GIC on the Platform Baseboard is cascaded off the
142 try to cover any generic kind of irqchip cascaded from a GPIO.
372 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
477 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
399 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
31 with the ability to configure and manage cascaded switches on top of each other140 It is possible to construct cascaded setups of DSA switches even if their383 a collection of dsa_chip_data structures if multiple switches are cascaded,417 when using a cascaded setup
324 (HBA) resets. These are cascaded into a chain of attempted
125 cascaded 8259 programmable interrupt controllers (PICs), that allow for a