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Searched refs:PRIx64 (Results 326 – 350 of 447) sorted by relevance

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/openbmc/qemu/hw/pci/
H A Dmsi.c372 " address: 0x%"PRIx64" data: 0x%"PRIx32"\n", in msi_notify()
/openbmc/qemu/block/
H A Dqcow2-cache.c341 "cache: Offset %#" PRIx64 " is unaligned", in qcow2_cache_do_get()
H A Dblklogwrites.c120 error_setg(errp, "Invalid flags 0x%"PRIx64" in log entry %"PRIu64, in blk_log_writes_find_cur_log_sector()
/openbmc/qemu/target/i386/kvm/
H A Dxen-emu.c1788 PRId64 " (0x%" PRIx64 " 0x%" PRIx64 " 0x%" PRIx64 ")\n", in kvm_xen_handle_exit()
/openbmc/qemu/hw/ssi/
H A Dxilinx_spips.c1228 DB_PRINT_L(1, "addr: %08" HWADDR_PRIx ", data: %08" PRIx64 "\n", in lqspi_read()
1245 qemu_log_mask(LOG_GUEST_ERROR, "%s Unexpected %u-bit access to 0x%" PRIx64 in lqspi_write()
1246 " (value: 0x%" PRIx64 "\n", in lqspi_write()
/openbmc/qemu/hw/core/
H A Dqdev-properties-system.c707 rc = snprintf(buffer, sizeof(buffer), "0x%"PRIx64":0x%"PRIx64":%u", in get_reserved_region()
/openbmc/qemu/hw/net/
H A Dtulip.c551 " 0x%"PRIx64"\n", __func__, addr); in tulip_read()
856 "0x%"PRIx64"\n", __func__, addr); in tulip_write()
H A Dftgmac100.c871 "%s: transmit descriptor too small: %" PRIx64 in ftgmac100_write()
878 "%s: receive descriptor too small : %" PRIx64 in ftgmac100_write()
/openbmc/qemu/migration/
H A Dram.c4150 error_setg(errp, "ramblock '%s' bitmap size mismatch (0x%"PRIx64 in ram_dirty_bitmap_reload()
4151 " != 0x%"PRIx64")", block->idstr, size, local_size); in ram_dirty_bitmap_reload()
4160 "(size 0x%"PRIx64", got: 0x%"PRIx64")", in ram_dirty_bitmap_reload()
4166 error_setg(errp, "ramblock '%s' end mark incorrect: 0x%"PRIx64, in ram_dirty_bitmap_reload()
/openbmc/qemu/hw/misc/
H A Daspeed_hace.c363 "%s: Invalid hash algorithm selection 0x%"PRIx64"\n", in aspeed_hace_write()
H A Dzynq_slcr.c521 DB_PRINT("addr: %08" HWADDR_PRIx " data: %08" PRIx64 "\n", offset * 4, val); in zynq_slcr_write()
/openbmc/qemu/system/
H A Dcpus.c779 error_setg(errp, "Invalid addr 0x%016" PRIx64 "/size %" PRId64 in qmp_memsave()
/openbmc/qemu/target/arm/
H A Dkvm64.c1199 " (%"PRIx64", %"PRIx32")", in kvm_arm_handle_debug()
1224 error_report("%s: unhandled debug exit (%"PRIx32", %"PRIx64")", in kvm_arm_handle_debug()
/openbmc/qemu/hw/display/
H A Dg364fb.c426 error_report("g364: invalid write of 0x%" PRIx64 in g364fb_ctrl_write()
H A Dqxl.c1323 qxl_set_guest_bug(d, "%s: guest_start > guest_end 0x%" PRIx64 in qxl_add_memslot()
1324 " > 0x%" PRIx64, __func__, guest_start, guest_end); in qxl_add_memslot()
2177 dprint(qxl, 1, "vram/32: %" PRIx64 " MB [region 1]\n",
2179 dprint(qxl, 1, "vram/64: %" PRIx64 " MB %s\n",
/openbmc/qemu/hw/ppc/
H A Dpnv.c1275 chip->dt_isa_nodename = g_strdup_printf("/xscom@%" PRIx64 "/isa@%x", in pnv_chip_power8_realize()
1565 chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", in pnv_chip_power9_realize()
1810 chip->dt_isa_nodename = g_strdup_printf("/lpcm-opb@%" PRIx64 "/lpc@0", in pnv_chip_power10_realize()
1932 error_setg(errp, "warning: invalid core mask for chip Ox%"PRIx64" !", in pnv_chip_core_sanitize()
/openbmc/qemu/hw/sd/
H A Dpxa2xx_mmci.c467 "(value 0x%08" PRIx64 ")\n", __func__, offset, value); in pxa2xx_mmci_write()
/openbmc/qemu/target/i386/tcg/sysemu/
H A Dsvm_helper.c722 qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016" in cpu_vmexit()
723 PRIx64 ", " TARGET_FMT_lx ")!\n", in cpu_vmexit()
/openbmc/qemu/nbd/
H A Dclient.c907 error_setg(errp, "Bad initial magic received: 0x%" PRIx64, magic); in nbd_start_negotiate()
983 error_setg(errp, "Bad server magic received: 0x%" PRIx64, magic); in nbd_start_negotiate()
/openbmc/qemu/hw/vfio/
H A Dcommon.c527 error_report("%s received unaligned region %s iova=0x%"PRIx64 in vfio_listener_valid_section()
528 " offset_within_region=0x%"PRIx64 in vfio_listener_valid_section()
H A Dhelpers.c185 error_report("%s(%s:region%d+0x%"HWADDR_PRIx", 0x%"PRIx64 in vfio_region_write()
/openbmc/qemu/hw/dma/
H A Di8257.c191 qemu_log_mask(LOG_UNIMP, "%s: cmd 0x%02"PRIx64" not supported\n", in i8257_write_cont()
/openbmc/qemu/hw/xen/
H A Dxen_pt_msi.c577 XEN_PT_LOG(d, "get MSI-X table BAR base 0x%"PRIx64"\n", msix->table_base); in xen_pt_msix_init()
/openbmc/qemu/include/hw/pci/
H A Dpci.h120 #define FMT_PCIBUS PRIx64
/openbmc/qemu/hw/arm/
H A Dvexpress.c438 char *nodename = g_strdup_printf("/virtio_mmio@%" PRIx64, addr); in add_virtio_mmio_node()

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