/openbmc/qemu/hw/intc/ |
H A D | goldfish_pic.c | 90 "%s: unimplemented register read 0x%02"HWADDR_PRIx"\n", in goldfish_pic_read() 120 "%s: unimplemented register write 0x%02"HWADDR_PRIx"\n", in goldfish_pic_write()
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H A D | loongson_liointc.c | 150 qemu_log_mask(CPU_LOG_INT, "%s: size=%d, addr=%"HWADDR_PRIx", val=%x\n", in liointc_read() 162 qemu_log_mask(CPU_LOG_INT, "%s: size=%d, addr=%"HWADDR_PRIx", val=%x\n", in liointc_write()
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H A D | bcm2835_ic.c | 128 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", in bcm2835_ic_read() 165 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", in bcm2835_ic_write()
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/openbmc/qemu/hw/misc/ |
H A D | aspeed_i3c.c | 153 "%s: write to readonly register[0x%02" HWADDR_PRIx in aspeed_i3c_device_write() 235 "%s: Unsupported I2C mode [0x%08" HWADDR_PRIx in aspeed_i3c_write() 242 "%s: Unsupported slave mode [%08" HWADDR_PRIx in aspeed_i3c_write()
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H A D | stm32l4x5_syscfg.c | 129 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in stm32l4x5_syscfg_read() 201 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in stm32l4x5_syscfg_write()
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H A D | imx7_src.c | 115 HWADDR_PRIx "\n", TYPE_IMX7_SRC, __func__, offset); in imx7_src_read() 177 HWADDR_PRIx "\n", TYPE_IMX7_SRC, __func__, offset); in imx7_src_write()
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H A D | imx25_ccm.c | 238 HWADDR_PRIx "\n", TYPE_IMX25_CCM, __func__, offset); in imx25_ccm_read() 263 HWADDR_PRIx "\n", TYPE_IMX25_CCM, __func__, offset); in imx25_ccm_write()
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H A D | nrf51_rng.c | 55 "%s: bad read offset 0x%" HWADDR_PRIx "\n", in rng_read() 133 "%s: bad write offset 0x%" HWADDR_PRIx "\n", in rng_write()
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H A D | mips_cmgcr.c | 113 qemu_log_mask(LOG_UNIMP, "Read %d bytes at GCR offset 0x%" HWADDR_PRIx in gcr_read() 164 qemu_log_mask(LOG_UNIMP, "Write %d bytes at GCR offset 0x%" HWADDR_PRIx in gcr_write()
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H A D | imx6_src.c | 110 HWADDR_PRIx "\n", TYPE_IMX6_SRC, __func__, offset); in imx6_src_read() 172 HWADDR_PRIx "\n", TYPE_IMX6_SRC, __func__, offset); in imx6_src_write()
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H A D | zynq_slcr.c | 512 " addr %" HWADDR_PRIx "\n", offset * 4); in zynq_slcr_read() 515 DB_PRINT("addr: %08" HWADDR_PRIx " data: %08" PRIx32 "\n", offset * 4, ret); in zynq_slcr_read() 525 DB_PRINT("addr: %08" HWADDR_PRIx " data: %08" PRIx64 "\n", offset * 4, val); in zynq_slcr_write() 529 "addr %" HWADDR_PRIx "\n", offset * 4); in zynq_slcr_write()
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/openbmc/qemu/hw/fsi/ |
H A D | aspeed_apb2opb.c | 104 "%s: Out of bounds read: 0x%"HWADDR_PRIx" for %u\n", in fsi_aspeed_apb2opb_read() 160 "%s: Out of bounds write: %"HWADDR_PRIx" for %u\n", in fsi_aspeed_apb2opb_write() 220 "%s: Invalid operation: 0x%"HWADDR_PRIx" for %u\n", in fsi_aspeed_apb2opb_write()
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/openbmc/qemu/hw/vfio/ |
H A D | spapr.c | 314 error_report("Host doesn't support DMA window at %"HWADDR_PRIx", must be %"PRIx64, in vfio_spapr_create_window() 354 " 0x%"HWADDR_PRIx"..0x%"HWADDR_PRIx, container, in vfio_spapr_container_add_section_window() 440 hw_error("%s: Cannot delete missing window at %"HWADDR_PRIx, in vfio_spapr_container_del_section_window()
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/openbmc/qemu/hw/net/ |
H A D | npcm7xx_emc.c | 217 HWADDR_PRIx "\n", __func__, addr); in emc_read_tx_desc() 238 HWADDR_PRIx "\n", __func__, addr); in emc_write_tx_desc() 249 HWADDR_PRIx "\n", __func__, addr); in emc_read_rx_desc() 270 HWADDR_PRIx "\n", __func__, addr); in emc_write_rx_desc() 625 "%s: Invalid offset 0x%04" HWADDR_PRIx "\n", in npcm7xx_emc_read() 665 "%s: Invalid offset 0x%04" HWADDR_PRIx "\n", in npcm7xx_emc_write()
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H A D | npcm_gmac.c | 215 HWADDR_PRIx "\n", __func__, addr); in gmac_read_rx_desc() 235 HWADDR_PRIx "\n", __func__, addr); in gmac_write_rx_desc() 246 HWADDR_PRIx "\n", __func__, addr); in gmac_read_tx_desc() 266 HWADDR_PRIx "\n", __func__, addr); in gmac_write_tx_desc() 711 "%s: Read of write-only reg: offset: 0x%04" HWADDR_PRIx in npcm_gmac_read() 744 "%s: Write of read-only reg: offset: 0x%04" HWADDR_PRIx in npcm_gmac_write() 824 HWADDR_PRIx ", value: 0x%04" PRIx64 "\n", in npcm_gmac_write()
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/openbmc/qemu/hw/sd/ |
H A D | aspeed_sdhci.c | 59 "%s: Out-of-bounds read at 0x%" HWADDR_PRIx "\n", in aspeed_sdhci_read() 98 "%s: Out-of-bounds write at 0x%" HWADDR_PRIx "\n", in aspeed_sdhci_write()
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/openbmc/qemu/hw/pci-host/ |
H A D | pnv_phb3_pbcq.c | 160 phb3_pbcq_error(pbcq, "%s @0x%"HWADDR_PRIx"=%"PRIx64, __func__, in pnv_pbcq_nest_xscom_write() 177 phb3_pbcq_error(pbcq, "%s @0x%"HWADDR_PRIx"=%"PRIx64, __func__, in pnv_pbcq_pci_xscom_write() 203 phb3_pbcq_error(pbcq, "%s @0x%"HWADDR_PRIx"=%"PRIx64, __func__, in pnv_pbcq_spci_xscom_write()
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/openbmc/qemu/hw/i2c/ |
H A D | bcm2835_i2c.c | 129 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in bcm2835_i2c_read() 205 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in bcm2835_i2c_write()
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H A D | npcm7xx_smbus.c | 743 "%s: read from invalid offset 0x%" HWADDR_PRIx "\n", in npcm7xx_smbus_read() 804 "%s: read from invalid offset 0x%" HWADDR_PRIx "\n", in npcm7xx_smbus_read() 861 "%s: write to read-only reg: offset 0x%" HWADDR_PRIx "\n", in npcm7xx_smbus_write() 871 "%s: write to read-only reg: offset 0x%" HWADDR_PRIx "\n", in npcm7xx_smbus_write() 910 "%s: write to invalid offset 0x%" HWADDR_PRIx "\n", in npcm7xx_smbus_write() 971 "%s: write to invalid offset 0x%" HWADDR_PRIx "\n", in npcm7xx_smbus_write()
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/openbmc/qemu/hw/char/ |
H A D | bcm2835_aux.c | 151 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", in bcm2835_aux_read() 213 qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n", in bcm2835_aux_write()
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H A D | goldfish_tty.c | 60 "%s: unimplemented register read 0x%02"HWADDR_PRIx"\n", in goldfish_tty_read() 153 "%s: unimplemented register write 0x%02"HWADDR_PRIx"\n", in goldfish_tty_write()
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/openbmc/qemu/hw/ppc/ |
H A D | pnv_xscom.c | 166 HWADDR_PRIx " pcba=0x%08x\n", addr, pcba); in xscom_read() 192 HWADDR_PRIx " pcba=0x%08x data=0x%" PRIx64 "\n", in xscom_write()
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/openbmc/qemu/hw/arm/ |
H A D | pxa2xx.c | 122 "%s: Bad read offset 0x%"HWADDR_PRIx"\n", in pxa2xx_pm_read() 155 "%s: Bad write offset 0x%"HWADDR_PRIx"\n", in pxa2xx_pm_write() 198 "%s: Bad read offset 0x%"HWADDR_PRIx"\n", in pxa2xx_cm_read() 225 "%s: Bad write offset 0x%"HWADDR_PRIx"\n", in pxa2xx_cm_write() 431 "%s: Bad read offset 0x%"HWADDR_PRIx"\n", in pxa2xx_mm_read() 452 "%s: Bad write offset 0x%"HWADDR_PRIx"\n", in pxa2xx_mm_write() 660 "%s: Bad read offset 0x%"HWADDR_PRIx"\n", in pxa2xx_ssp_read() 754 "%s: Bad write offset 0x%"HWADDR_PRIx"\n", in pxa2xx_ssp_write() 1017 "%s: Bad read offset 0x%"HWADDR_PRIx"\n", in pxa2xx_rtc_read() 1377 "%s: Bad read offset 0x%"HWADDR_PRIx"\n", in pxa2xx_i2c_read() [all …]
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/openbmc/qemu/hw/ssi/ |
H A D | bcm2835_spi.c | 134 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in bcm2835_spi_read() 213 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, addr); in bcm2835_spi_write()
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/openbmc/qemu/hw/timer/ |
H A D | pxa2xx_timer.c | 261 "%s: unknown register 0x%02" HWADDR_PRIx "\n", in pxa2xx_timer_read() 266 "%s: incorrect register 0x%02" HWADDR_PRIx "\n", in pxa2xx_timer_read() 392 "%s: unknown register 0x%02" HWADDR_PRIx " " in pxa2xx_timer_write() 397 "%s: incorrect register 0x%02" HWADDR_PRIx " " in pxa2xx_timer_write()
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