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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-pci475 These files provide an interface to PCIe Resizable BAR support.
476 A file is created for each BAR resource (N) supported by the
477 PCIe Resizable BAR extended capability of the device. Reading
483 The bitmap represents supported resource sizes for the BAR,
485 example the device supports 64MB, 128MB, and 256MB BAR sizes.
/openbmc/qemu/docs/
H A Dpvrdma.txt220 BAR 0 - MSI-X
226 BAR 1 - Registers
242 BAR 2 - UAR
H A Digd-assign.txt59 Failed to mmap 0000:00:02.0 BAR <>. Performance may be slow
/openbmc/linux/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/
H A Dswitchdev.rst79 A subfunction has a dedicated window in PCI BAR space that is not shared
82 PCI BAR space.
/openbmc/qemu/qapi/
H A Dpci.json40 # @mem_type_64: if @type is 'memory', true if the BAR is 64-bit
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-ep.yaml29 - description: BAR memory region
/openbmc/qemu/docs/specs/
H A Divshmem-spec.rst9 said memory to the guest as a PCI BAR.
59 BAR 0 contains the following registers:
/openbmc/linux/Documentation/powerpc/
H A Deeh-pci-error-recovery.rst95 config space (the base address registers (BAR's), latency timer,
177 It saves the device BAR's and then calls rpaphp_unconfig_pci_adapter().
183 It then resets the PCI card, reconfigures the device BAR's, and
/openbmc/linux/Documentation/driver-api/
H A Dswitchtec.rst97 NT EP BAR 2 will be dynamically configured as a Direct Window, and
/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmscc,ocelot.yaml45 EA BAR 0) used to access the MAC PCS registers truly belongs to the enetc
/openbmc/linux/Documentation/translations/zh_CN/PCI/
H A Dpci.rst244 范围）和 ``request_region()`` （用于IO端口范围）。对于那些不被 "正常 "PCI BAR描
/openbmc/linux/Documentation/scsi/
H A DChangeLog.sym53c8xx37 - Get both the BAR cookies used by CPU and actual PCI BAR
40 BAR values to destination address to make decision.
44 PCI BAR value from the BAR cookie is now useless.
H A DChangeLog.ncr53c8xx10 - Get both the BAR cookies actual and PCI BAR values.
/openbmc/linux/Documentation/PCI/endpoint/
H A Dpci-test-howto.rst145 BAR tests
/openbmc/qemu/hw/vfio/
H A Dtrace-events19 vfio_msix_relo(const char *name, int bar, uint64_t offset) " (%s) BAR %d offset 0x%"PRIx64""
30 …able_bar, int offset, int entries, bool noresize) "%s PCI MSI-X CAP @0x%x, BAR %d, offset 0x%x, en…
/openbmc/qemu/docs/devel/
H A Dmulti-process.rst368 read-only, but certain registers (especially BAR and MSI-related ones)
501 those handlers with a PCI BAR, as they do within QEMU currently.
506 accomplish that, guest BAR programming must also be forwarded from QEMU
629 | id | range ID (e.g., PCI BAR) |
730 when a guest changes a device's PCI BAR registers.
893 config space. Much like the BAR case above, the proxy object must look
/openbmc/linux/Documentation/arch/arm/
H A Dixp4xx.rst79 To access PCI via this space, we simply ioremap() the BAR
/openbmc/linux/Documentation/arch/x86/
H A Dearlyprintk.rst35 Capabilities: [58] Debug port: BAR=1 offset=00a0
/openbmc/openbmc/poky/bitbake/doc/bitbake-user-manual/
H A Dbitbake-user-manual-metadata.rst170 assignment, ``BAR`` expands to the literal string "${FOO}" as long as
173 BAR = "${FOO}"
1186 d.appendVar('BAR',' bar 2')
1189 BAR = "bar 1"
1195 BAR = "bar 1"
1197 BAR += "bar 2"
1200 ``BAR`` with the value "bar 1 bar 2". Just as in the second snippet, the
1458 bar = origenv.getVar("BAR", False)
1460 The previous example returns ``BAR`` from the original execution
/openbmc/linux/Documentation/core-api/
H A Ddma-api-howto.rst68 example, if a PCI device has a BAR, the kernel reads the bus address (A)
69 from the BAR and converts it to a CPU physical address (B). The address B
848 ringp->len = BAR;
853 dma_unmap_len_set(ringp, len, BAR);
/openbmc/linux/Documentation/fpga/
H A Ddfl.rst640 indicates the BAR, and bits 31:3 form the 8 byte aligned offset where bits 2:0 are
654 Being able to specify more than one DFL per BAR has been considered, but it
656 per BAR simplifies the implementation and allows for extra error checking.
/openbmc/linux/Documentation/mhi/
H A Dmhi.rst191 In the case of PCIe, the device is enumerated and assigned BAR-0 for
/openbmc/u-boot/arch/sh/include/asm/
H A Dcpu_sh7722.h206 #define BAR 0xA4150040 macro
/openbmc/linux/Documentation/gpu/
H A Ddrm-internals.rst138 or exists on the PCI device in the ROM BAR. Note that after the ROM has
/openbmc/linux/Documentation/driver-api/driver-model/
H A Ddevres.rst327 pcim_iomap_table() : array of mapped addresses indexed by BAR

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