Searched hist:ff5a9017 (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/sound/soc/mediatek/mt8195/ |
| H A D | mt8195-afe-clk.h | ff5a9017 Sun Feb 20 23:57:16 CST 2022 Trevor Wu <trevor.wu@mediatek.com> ASoC: mediatek: mt8195: enable apll tuner
Normally, the clock source of audio module is either 26M or APLL1/APLL2,
but APLL1/APLL2 are not the multiple of 26M.
In the patch, APLL1 and APLL2 tuners are enabled to handle sample rate
mismatch when the data path crosses two different clock domains.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Link: https://lore.kernel.org/r/20220221055716.18580-1-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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| H A D | mt8195-afe-clk.c | ff5a9017 Sun Feb 20 23:57:16 CST 2022 Trevor Wu <trevor.wu@mediatek.com> ASoC: mediatek: mt8195: enable apll tuner
Normally, the clock source of audio module is either 26M or APLL1/APLL2,
but APLL1/APLL2 are not the multiple of 26M.
In the patch, APLL1 and APLL2 tuners are enabled to handle sample rate
mismatch when the data path crosses two different clock domains.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Link: https://lore.kernel.org/r/20220221055716.18580-1-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
|
| H A D | mt8195-afe-pcm.c | ff5a9017 Sun Feb 20 23:57:16 CST 2022 Trevor Wu <trevor.wu@mediatek.com> ASoC: mediatek: mt8195: enable apll tuner
Normally, the clock source of audio module is either 26M or APLL1/APLL2,
but APLL1/APLL2 are not the multiple of 26M.
In the patch, APLL1 and APLL2 tuners are enabled to handle sample rate
mismatch when the data path crosses two different clock domains.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Link: https://lore.kernel.org/r/20220221055716.18580-1-trevor.wu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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