Searched hist:fe364a7d (Results 1 – 5 of 5) sorted by relevance
| /openbmc/linux/drivers/dma/dw/ |
| H A D | idma32.c | fe364a7d Mon Jul 12 06:39:40 CDT 2021 Andy Shevchenko <andriy.shevchenko@linux.intel.com> dmaengine: dw: Program xBAR hardware for Elkhart Lake
Intel Elkhart Lake PSE DMA implementation is integrated with crossbar IP
in order to serve more hardware than there are DMA request lines available.
Due to this, program xBAR hardware to make flexible support of PSE peripheral.
The Device-to-Device has not been tested and it's not supported by DMA Engine,
but it's left in the code for the sake of documenting hardware features.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210712113940.42753-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
| H A D | internal.h | fe364a7d Mon Jul 12 06:39:40 CDT 2021 Andy Shevchenko <andriy.shevchenko@linux.intel.com> dmaengine: dw: Program xBAR hardware for Elkhart Lake
Intel Elkhart Lake PSE DMA implementation is integrated with crossbar IP
in order to serve more hardware than there are DMA request lines available.
Due to this, program xBAR hardware to make flexible support of PSE peripheral.
The Device-to-Device has not been tested and it's not supported by DMA Engine,
but it's left in the code for the sake of documenting hardware features.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210712113940.42753-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
| H A D | pci.c | fe364a7d Mon Jul 12 06:39:40 CDT 2021 Andy Shevchenko <andriy.shevchenko@linux.intel.com> dmaengine: dw: Program xBAR hardware for Elkhart Lake
Intel Elkhart Lake PSE DMA implementation is integrated with crossbar IP
in order to serve more hardware than there are DMA request lines available.
Due to this, program xBAR hardware to make flexible support of PSE peripheral.
The Device-to-Device has not been tested and it's not supported by DMA Engine,
but it's left in the code for the sake of documenting hardware features.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210712113940.42753-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
| H A D | platform.c | fe364a7d Mon Jul 12 06:39:40 CDT 2021 Andy Shevchenko <andriy.shevchenko@linux.intel.com> dmaengine: dw: Program xBAR hardware for Elkhart Lake
Intel Elkhart Lake PSE DMA implementation is integrated with crossbar IP
in order to serve more hardware than there are DMA request lines available.
Due to this, program xBAR hardware to make flexible support of PSE peripheral.
The Device-to-Device has not been tested and it's not supported by DMA Engine,
but it's left in the code for the sake of documenting hardware features.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210712113940.42753-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|
| /openbmc/linux/include/linux/platform_data/ |
| H A D | dma-dw.h | fe364a7d Mon Jul 12 06:39:40 CDT 2021 Andy Shevchenko <andriy.shevchenko@linux.intel.com> dmaengine: dw: Program xBAR hardware for Elkhart Lake
Intel Elkhart Lake PSE DMA implementation is integrated with crossbar IP
in order to serve more hardware than there are DMA request lines available.
Due to this, program xBAR hardware to make flexible support of PSE peripheral.
The Device-to-Device has not been tested and it's not supported by DMA Engine,
but it's left in the code for the sake of documenting hardware features.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20210712113940.42753-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
|