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H A Dpata_hpt3x2n.cfd5e62e2 Mon Dec 07 13:38:11 CST 2009 Sergei Shtylyov <sshtylyov@ru.mvista.com> pata_hpt{37x|3x2n}: improve timing register documentation

Describe UDMA timing bits 18-20 and 21 separately; add a note to bit
31 about it being meaningful for PIO only. Reformat the whole comment,
while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
fd5e62e2 Mon Dec 07 13:38:11 CST 2009 Sergei Shtylyov <sshtylyov@ru.mvista.com> pata_hpt{37x|3x2n}: improve timing register documentation

Describe UDMA timing bits 18-20 and 21 separately; add a note to bit
31 about it being meaningful for PIO only. Reformat the whole comment,
while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
H A Dpata_hpt37x.cfd5e62e2 Mon Dec 07 13:38:11 CST 2009 Sergei Shtylyov <sshtylyov@ru.mvista.com> pata_hpt{37x|3x2n}: improve timing register documentation

Describe UDMA timing bits 18-20 and 21 separately; add a note to bit
31 about it being meaningful for PIO only. Reformat the whole comment,
while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
fd5e62e2 Mon Dec 07 13:38:11 CST 2009 Sergei Shtylyov <sshtylyov@ru.mvista.com> pata_hpt{37x|3x2n}: improve timing register documentation

Describe UDMA timing bits 18-20 and 21 separately; add a note to bit
31 about it being meaningful for PIO only. Reformat the whole comment,
while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>