Home
last modified time | relevance | path

Searched hist:fcecdcd3 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/mips/loongson64/
H A Dsetup.cfcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
fcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
H A Denv.cfcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
fcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
/openbmc/linux/arch/mips/include/asm/mach-loongson64/
H A Dbuiltin_dtbs.hfcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
fcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
H A Dloongson.hfcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
fcecdcd3 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs

Load proper dtb according to firmware passed parameters and
CPU PRID.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>