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/openbmc/u-boot/configs/ |
H A D | cougarcanyon2_defconfig | fb05f0b02b01aed48db48f02a15e52c6de2d0dac Sun Jun 03 21:04:17 CDT 2018 Bin Meng <bmeng.cn@gmail.com> x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
As README.x86 already mentions, there are two SPI flashes mounted on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively. SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores the actual BIOS image which is U-Boot. Building a single image with both ME firmware and U-Boot does not make sense.
This also describes the exact flash location where the u-boot.rom should be programmed in the documentation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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/openbmc/u-boot/doc/ |
H A D | README.x86 | fb05f0b02b01aed48db48f02a15e52c6de2d0dac Sun Jun 03 21:04:17 CDT 2018 Bin Meng <bmeng.cn@gmail.com> x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
As README.x86 already mentions, there are two SPI flashes mounted on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively. SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores the actual BIOS image which is U-Boot. Building a single image with both ME firmware and U-Boot does not make sense.
This also describes the exact flash location where the u-boot.rom should be programmed in the documentation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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