Searched hist:f85a8e8d (Results 1 – 6 of 6) sorted by relevance
/openbmc/u-boot/board/freescale/ls1021aqds/ |
H A D | README | f85a8e8d Tue Sep 13 22:36:14 CDT 2016 Xiaoliang Yang <xiaoliang.yang@nxp.com> armv7: LS1021a: enable i-cache in start.S Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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/openbmc/u-boot/board/freescale/ls1021atwr/ |
H A D | README | f85a8e8d Tue Sep 13 22:36:14 CDT 2016 Xiaoliang Yang <xiaoliang.yang@nxp.com> armv7: LS1021a: enable i-cache in start.S Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/ |
H A D | soc.c | f85a8e8d Tue Sep 13 22:36:14 CDT 2016 Xiaoliang Yang <xiaoliang.yang@nxp.com> armv7: LS1021a: enable i-cache in start.S Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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/openbmc/u-boot/arch/arm/cpu/armv7/ |
H A D | Makefile | f85a8e8d Tue Sep 13 22:36:14 CDT 2016 Xiaoliang Yang <xiaoliang.yang@nxp.com> armv7: LS1021a: enable i-cache in start.S Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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/openbmc/u-boot/include/configs/ |
H A D | ls1021atwr.h | f85a8e8d Tue Sep 13 22:36:14 CDT 2016 Xiaoliang Yang <xiaoliang.yang@nxp.com> armv7: LS1021a: enable i-cache in start.S Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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H A D | ls1021aqds.h | f85a8e8d Tue Sep 13 22:36:14 CDT 2016 Xiaoliang Yang <xiaoliang.yang@nxp.com> armv7: LS1021a: enable i-cache in start.S Delete CONFIG_SKIP_LOWLEVEL_INIT define in ls1021atwr.h and ls1021aqds.h can let it run cpu_init_cp15 to enable i-cache. First stage of u-boot can run faster after that. There is a description about skip lowlevel init in board/freescale/ls1021atwr/README. Signed-off-by: Xiaoliang Yang <xiaoliang.yang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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