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H A DKconfigf29ad10d Thu Oct 09 22:40:01 CDT 2014 Kelvin Cheung <keguang.zhang@gmail.com> MIPS: Loongson1B: Some fixes/updates for LS1B

- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data.
(It seems that the MAC controller of LS1B v2.0 can only accept pbl=1)
- Add GMAC1 support and setup MUX in terms of PHY mode.
- Add CPUFreq support.
- Add MUX Register Definitions.
- Add PWM Register Definitions.
- Update clock register bitfields according to the latest spec.
- Update clock related stuff.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8024/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
f29ad10d Thu Oct 09 22:40:01 CDT 2014 Kelvin Cheung <keguang.zhang@gmail.com> MIPS: Loongson1B: Some fixes/updates for LS1B

- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data.
(It seems that the MAC controller of LS1B v2.0 can only accept pbl=1)
- Add GMAC1 support and setup MUX in terms of PHY mode.
- Add CPUFreq support.
- Add MUX Register Definitions.
- Add PWM Register Definitions.
- Update clock register bitfields according to the latest spec.
- Update clock related stuff.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8024/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>