Searched hist:f18bdfa1 (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/arch/mips/include/asm/ |
H A D | cpu-features.h | f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig
The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception.
KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first.
[ralf@linux-mips.org: resolve merge conflict.]
Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception. KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first. [ralf@linux-mips.org: resolve merge conflict.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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H A D | cpu.h | f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig
The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception.
KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first.
[ralf@linux-mips.org: resolve merge conflict.]
Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception. KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first. [ralf@linux-mips.org: resolve merge conflict.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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H A D | mipsregs.h | f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig
The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception.
KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first.
[ralf@linux-mips.org: resolve merge conflict.]
Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception. KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first. [ralf@linux-mips.org: resolve merge conflict.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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/openbmc/linux/arch/mips/kernel/ |
H A D | cpu-probe.c | f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig
The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception.
KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first.
[ralf@linux-mips.org: resolve merge conflict.]
Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> f18bdfa1 Wed May 11 07:50:52 CDT 2016 James Hogan <james.hogan@imgtec.com> MIPS: Add defs & probing of [X]ContextConfig The CP0_[X]ContextConfig registers are present if CP0_Config3.CTXTC or CP0_Config3.SM are set, and provide more control over which bits of CP0_[X]Context are set to the faulting virtual address on a TLB exception. KVM/VZ will need to be able to save and restore these registers in the guest context, so add the relevant definitions and probing of the ContextConfig feature in the root context first. [ralf@linux-mips.org: resolve merge conflict.] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13225/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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