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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194-p2888.dtsieef97c2a Fri Jul 26 05:16:16 CDT 2019 Thierry Reding <treding@nvidia.com> arm64: tegra: Add unit-address for CBB on Tegra194

The control back-bone (CBB) starts at physical address 0, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.

Signed-off-by: Thierry Reding <treding@nvidia.com>
eef97c2a Fri Jul 26 05:16:16 CDT 2019 Thierry Reding <treding@nvidia.com> arm64: tegra: Add unit-address for CBB on Tegra194

The control back-bone (CBB) starts at physical address 0, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.

Signed-off-by: Thierry Reding <treding@nvidia.com>
H A Dtegra194-p2972-0000.dtseef97c2a Fri Jul 26 05:16:16 CDT 2019 Thierry Reding <treding@nvidia.com> arm64: tegra: Add unit-address for CBB on Tegra194

The control back-bone (CBB) starts at physical address 0, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.

Signed-off-by: Thierry Reding <treding@nvidia.com>
eef97c2a Fri Jul 26 05:16:16 CDT 2019 Thierry Reding <treding@nvidia.com> arm64: tegra: Add unit-address for CBB on Tegra194

The control back-bone (CBB) starts at physical address 0, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.

Signed-off-by: Thierry Reding <treding@nvidia.com>
H A Dtegra194.dtsieef97c2a Fri Jul 26 05:16:16 CDT 2019 Thierry Reding <treding@nvidia.com> arm64: tegra: Add unit-address for CBB on Tegra194

The control back-bone (CBB) starts at physical address 0, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.

Signed-off-by: Thierry Reding <treding@nvidia.com>
eef97c2a Fri Jul 26 05:16:16 CDT 2019 Thierry Reding <treding@nvidia.com> arm64: tegra: Add unit-address for CBB on Tegra194

The control back-bone (CBB) starts at physical address 0, so give it a
unit-address to comply with standard naming practices checked for by the
device tree compiler.

Signed-off-by: Thierry Reding <treding@nvidia.com>