Searched hist:ed47c5cb (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/i915/gvt/ |
| H A D | gtt.h | ed47c5cb Tue Feb 19 22:07:45 CST 2019 Zhao Yakui <yakui.zhao@intel.com> drm/i915/gvt: Refine the combined intel_vgpu_oos_page struct to save memory
The intel_vgpu_oos_page uses the combined structure, which embeds the
tracked page. As it is allocated by kmalloc, the size(4140) is aligned
to 8192. The 8192 oos_pages will waste about 32M memory.
So the tracked page is split from the intel_vgpu_oos_page. And this will
help to assure that the access of tracked page is cache aligned.
Another minor change is that it doesn't need to be cleared to zero as
it is writen firstly when one page is added to oos_page list.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
ed47c5cb Tue Feb 19 22:07:45 CST 2019 Zhao Yakui <yakui.zhao@intel.com> drm/i915/gvt: Refine the combined intel_vgpu_oos_page struct to save memory
The intel_vgpu_oos_page uses the combined structure, which embeds the
tracked page. As it is allocated by kmalloc, the size(4140) is aligned
to 8192. The 8192 oos_pages will waste about 32M memory.
So the tracked page is split from the intel_vgpu_oos_page. And this will
help to assure that the access of tracked page is cache aligned.
Another minor change is that it doesn't need to be cleared to zero as
it is writen firstly when one page is added to oos_page list.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
|
| H A D | gtt.c | ed47c5cb Tue Feb 19 22:07:45 CST 2019 Zhao Yakui <yakui.zhao@intel.com> drm/i915/gvt: Refine the combined intel_vgpu_oos_page struct to save memory
The intel_vgpu_oos_page uses the combined structure, which embeds the
tracked page. As it is allocated by kmalloc, the size(4140) is aligned
to 8192. The 8192 oos_pages will waste about 32M memory.
So the tracked page is split from the intel_vgpu_oos_page. And this will
help to assure that the access of tracked page is cache aligned.
Another minor change is that it doesn't need to be cleared to zero as
it is writen firstly when one page is added to oos_page list.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
ed47c5cb Tue Feb 19 22:07:45 CST 2019 Zhao Yakui <yakui.zhao@intel.com> drm/i915/gvt: Refine the combined intel_vgpu_oos_page struct to save memory
The intel_vgpu_oos_page uses the combined structure, which embeds the
tracked page. As it is allocated by kmalloc, the size(4140) is aligned
to 8192. The 8192 oos_pages will waste about 32M memory.
So the tracked page is split from the intel_vgpu_oos_page. And this will
help to assure that the access of tracked page is cache aligned.
Another minor change is that it doesn't need to be cleared to zero as
it is writen firstly when one page is added to oos_page list.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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