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/openbmc/u-boot/arch/riscv/include/asm/
H A Dencoding.hea53f1c7 Wed Dec 12 08:12:36 CST 2018 Bin Meng <bmeng.cn@gmail.com> riscv: Add CSR numbers

The standard RISC-V ISA sets aside a 12-bit encoding space for up
to 4096 CSRs. This adds all known CSR numbers as defined in the
RISC-V Privileged Architecture Version 1.10.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup@brainfault.org>