Searched hist:e9fad6f1 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/staging/media/ipu3/ |
| H A D | ipu3-css-pool.h | e9fad6f1 Thu Dec 06 19:03:30 CST 2018 Yong Zhi <yong.zhi@intel.com> media: staging/intel-ipu3: css: Add dma buff pool utility functions
The pools are used to store previous parameters set by
user with the parameter queue. Due to pipelining,
there needs to be multiple sets (up to four)
of parameters which are queued in a host-to-sp queue.
[mchehab@kernel.org: fixed two minor issues on comments: a space before
tab and a typo: "vaid" -> "valid"]
Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
e9fad6f1 Thu Dec 06 19:03:30 CST 2018 Yong Zhi <yong.zhi@intel.com> media: staging/intel-ipu3: css: Add dma buff pool utility functions
The pools are used to store previous parameters set by
user with the parameter queue. Due to pipelining,
there needs to be multiple sets (up to four)
of parameters which are queued in a host-to-sp queue.
[mchehab@kernel.org: fixed two minor issues on comments: a space before
tab and a typo: "vaid" -> "valid"]
Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
|
| H A D | ipu3-css-pool.c | e9fad6f1 Thu Dec 06 19:03:30 CST 2018 Yong Zhi <yong.zhi@intel.com> media: staging/intel-ipu3: css: Add dma buff pool utility functions
The pools are used to store previous parameters set by
user with the parameter queue. Due to pipelining,
there needs to be multiple sets (up to four)
of parameters which are queued in a host-to-sp queue.
[mchehab@kernel.org: fixed two minor issues on comments: a space before
tab and a typo: "vaid" -> "valid"]
Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
e9fad6f1 Thu Dec 06 19:03:30 CST 2018 Yong Zhi <yong.zhi@intel.com> media: staging/intel-ipu3: css: Add dma buff pool utility functions
The pools are used to store previous parameters set by
user with the parameter queue. Due to pipelining,
there needs to be multiple sets (up to four)
of parameters which are queued in a host-to-sp queue.
[mchehab@kernel.org: fixed two minor issues on comments: a space before
tab and a typo: "vaid" -> "valid"]
Signed-off-by: Yong Zhi <yong.zhi@intel.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
|