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/openbmc/linux/drivers/clk/samsung/ |
H A D | clk-exynos5420.c | e867e8fa Thu Aug 25 01:57:17 CDT 2016 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5420: Add clocks for CMU_CDREX domain
This patch adds the mux/divider clocks for CMU_CDREX (DRAM Express Controller) which generates the clocks for DRAM and NoC (Network on Chip) bus. There is differnet source of MUX_MX_MSPLL_CCORE between exynos5420 and exynos5422, so each MUX_MX_MSPLL_CCORE uses the different parent source group.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> e867e8fa Thu Aug 25 01:57:17 CDT 2016 Chanwoo Choi <cw00.choi@samsung.com> clk: samsung: exynos5420: Add clocks for CMU_CDREX domain This patch adds the mux/divider clocks for CMU_CDREX (DRAM Express Controller) which generates the clocks for DRAM and NoC (Network on Chip) bus. There is differnet source of MUX_MX_MSPLL_CCORE between exynos5420 and exynos5422, so each MUX_MX_MSPLL_CCORE uses the different parent source group. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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