Searched hist:e85c9a7a (Results 1 – 5 of 5) sorted by relevance
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4vf/ |
H A D | t4vf_common.h | e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers
Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where
Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size
Based on original work by Casey Leedom <leedom@chelsio.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net> e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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H A D | t4vf_hw.c | e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers
Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where
Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size
Based on original work by Casey Leedom <leedom@chelsio.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net> e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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/openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/ |
H A D | t4_regs.h | e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers
Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where
Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size
Based on original work by Casey Leedom <leedom@chelsio.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net> e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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H A D | t4_hw.c | e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers
Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where
Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size
Based on original work by Casey Leedom <leedom@chelsio.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net> e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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H A D | cxgb4.h | e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers
Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where
Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size
Based on original work by Casey Leedom <leedom@chelsio.com>
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net> e85c9a7a Wed Dec 03 08:02:52 CST 2014 Hariprasad Shenai <hariprasad@chelsio.com> cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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