Searched hist:e7d3b21b (Results 1 – 4 of 4) sorted by relevance
/openbmc/u-boot/include/configs/ |
H A D | imx6_spl.h | e7d3b21b Mon Aug 17 03:11:05 CDT 2015 Peng Fan <Peng.Fan@freescale.com> imx: mx6slevk: add SPL support Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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H A D | mx6slevk.h | e7d3b21b Mon Aug 17 03:11:05 CDT 2015 Peng Fan <Peng.Fan@freescale.com> imx: mx6slevk: add SPL support Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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/openbmc/u-boot/configs/ |
H A D | mx6slevk_spl_defconfig | e7d3b21b Mon Aug 17 03:11:05 CDT 2015 Peng Fan <Peng.Fan@freescale.com> imx: mx6slevk: add SPL support Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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/openbmc/u-boot/board/freescale/mx6slevk/ |
H A D | mx6slevk.c | e7d3b21b Mon Aug 17 03:11:05 CDT 2015 Peng Fan <Peng.Fan@freescale.com> imx: mx6slevk: add SPL support Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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