Searched hist:e7a7b329 (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | mpc8569si-post.dtsi | e7a7b329 Wed Nov 09 16:26:13 CST 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Rework MPC8569MDS device tree
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include: * Moved to a standard 2 #address-cells & #size-cells at top-level * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Removed CPU properties setup by u-boot to match other .dts * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Renamed SDHC node from 'sdhci' to 'sdhc' * Dropping "fsl,mpc8569-IP..." from compatibles for standard blocks
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> e7a7b329 Wed Nov 09 16:26:13 CST 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Rework MPC8569MDS device tree Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to a standard 2 #address-cells & #size-cells at top-level * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Removed CPU properties setup by u-boot to match other .dts * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Renamed SDHC node from 'sdhci' to 'sdhc' * Dropping "fsl,mpc8569-IP..." from compatibles for standard blocks Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
H A D | mpc8569si-pre.dtsi | e7a7b329 Wed Nov 09 16:26:13 CST 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Rework MPC8569MDS device tree
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include: * Moved to a standard 2 #address-cells & #size-cells at top-level * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Removed CPU properties setup by u-boot to match other .dts * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Renamed SDHC node from 'sdhci' to 'sdhc' * Dropping "fsl,mpc8569-IP..." from compatibles for standard blocks
Signed-off-by: Kumar Gala <galak@kernel.crashing.org> e7a7b329 Wed Nov 09 16:26:13 CST 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Rework MPC8569MDS device tree Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to a standard 2 #address-cells & #size-cells at top-level * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Removed CPU properties setup by u-boot to match other .dts * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Renamed SDHC node from 'sdhci' to 'sdhc' * Dropping "fsl,mpc8569-IP..." from compatibles for standard blocks Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|