Searched hist:e72bb8a5 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/arch/powerpc/platforms/powernv/ |
| H A D | setup.c | e72bb8a5 Wed Jul 22 00:50:51 CDT 2015 Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> powerpc/powernv: Reset HILE before kexec_sequence()
On powernv secondary cpus are returned to OPAL, and will then enter
the target kernel in big-endian. However if it is set the HILE bit
will persist, causing the first exception in the target kernel to be
delivered in litte-endian regardless of the current endianness.
If running on top of OPAL make sure the HILE bit is reset once we've
finished waiting for all of the secondaries to be returned to OPAL.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
e72bb8a5 Wed Jul 22 00:50:51 CDT 2015 Samuel Mendoza-Jonas <sam.mj@au1.ibm.com> powerpc/powernv: Reset HILE before kexec_sequence()
On powernv secondary cpus are returned to OPAL, and will then enter
the target kernel in big-endian. However if it is set the HILE bit
will persist, causing the first exception in the target kernel to be
delivered in litte-endian regardless of the current endianness.
If running on top of OPAL make sure the HILE bit is reset once we've
finished waiting for all of the secondaries to be returned to OPAL.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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