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/openbmc/qemu/hw/mips/ |
H A D | boston.c | 3e1df4cc46678b155c9d721c73ab6e310d7dd546 Tue May 05 05:19:06 CDT 2020 Markus Armbruster <armbru@redhat.com> mips/boston: Plug memory leak in boston_mach_init()
Fixes: df1d8a1f29f567567b9d20be685a4241282e7005 Cc: Paul Burton <pburton@wavecomp.com> Cc: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200505101908.6207-9-armbru@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> 932d3a65c8bfe0c260d3564afc082c41febdd882 Tue May 05 05:19:05 CDT 2020 Markus Armbruster <armbru@redhat.com> mips/boston: Fix boston_mach_init() error handling
The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call.
boston_mach_init() is wrong that way. The last calls treats an error as fatal. Do that for the prior ones, too.
Fixes: df1d8a1f29f567567b9d20be685a4241282e7005 Cc: Paul Burton <pburton@wavecomp.com> Cc: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200505101908.6207-8-armbru@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> df1d8a1f29f567567b9d20be685a4241282e7005 Thu Sep 08 09:51:58 CDT 2016 Paul Burton <paul.burton@imgtec.com> hw/mips: MIPS Boston board support
Introduce support for emulating the MIPS Boston development board. The Boston board is built around an FPGA & 3 PCIe controllers, one of which is connected to an Intel EG20T Platform Controller Hub. It is used during the development & debug of new CPUs and the software intended to run on them, and is essentially the successor to the older MIPS Malta board.
This patch does not implement the EG20T, instead connecting an already supported ICH-9 AHCI controller. Whilst this isn't accurate it's enough for typical stock Boston software (eg. Linux kernels) to work with hard disks given that both the ICH-9 & EG20T implement the AHCI specification.
Boston boards typically boot kernels in the FIT image format, and this patch will treat kernels provided to QEMU as such. When loading a kernel directly, the board code will generate minimal firmware much as the Malta board code does. This firmware will set up the CM, CPC & GIC register base addresses then set argument registers & jump to the kernel entry point. Alternatively, bootloader code may be loaded using the bios argument in which case no firmware will be generated & execution will proceed from the start of the boot code at the default MIPS boot exception vector (offset 0x1fc00000 into (c)kseg1).
Currently real Boston boards are always used with FPGA bitfiles that include a Global Interrupt Controller (GIC), so the interrupt configuration is only defined for such cases. Therefore the board will only allow use of CPUs which implement the CPS components, including the GIC, and will otherwise exit with a message.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> [yongbok.kim@imgtec.com: isolated boston machine support for mips64el. updated for recent Chardev changes. ignore missing bios/kernel for qtest. added default -drive to if=ide explicitly. changed default memory size into 1G due to make check failure on 32-bit hosts] Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
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/openbmc/qemu/ |
H A D | configure | df1d8a1f29f567567b9d20be685a4241282e7005 Thu Sep 08 09:51:58 CDT 2016 Paul Burton <paul.burton@imgtec.com> hw/mips: MIPS Boston board support
Introduce support for emulating the MIPS Boston development board. The Boston board is built around an FPGA & 3 PCIe controllers, one of which is connected to an Intel EG20T Platform Controller Hub. It is used during the development & debug of new CPUs and the software intended to run on them, and is essentially the successor to the older MIPS Malta board.
This patch does not implement the EG20T, instead connecting an already supported ICH-9 AHCI controller. Whilst this isn't accurate it's enough for typical stock Boston software (eg. Linux kernels) to work with hard disks given that both the ICH-9 & EG20T implement the AHCI specification.
Boston boards typically boot kernels in the FIT image format, and this patch will treat kernels provided to QEMU as such. When loading a kernel directly, the board code will generate minimal firmware much as the Malta board code does. This firmware will set up the CM, CPC & GIC register base addresses then set argument registers & jump to the kernel entry point. Alternatively, bootloader code may be loaded using the bios argument in which case no firmware will be generated & execution will proceed from the start of the boot code at the default MIPS boot exception vector (offset 0x1fc00000 into (c)kseg1).
Currently real Boston boards are always used with FPGA bitfiles that include a Global Interrupt Controller (GIC), so the interrupt configuration is only defined for such cases. Therefore the board will only allow use of CPUs which implement the CPS components, including the GIC, and will otherwise exit with a message.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com> [yongbok.kim@imgtec.com: isolated boston machine support for mips64el. updated for recent Chardev changes. ignore missing bios/kernel for qtest. added default -drive to if=ide explicitly. changed default memory size into 1G due to make check failure on 32-bit hosts] Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
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