/openbmc/u-boot/doc/ |
H A D | README.xtensa | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/include/linux/ |
H A D | stat.h | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/examples/standalone/ |
H A D | stubs.c | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/cmd/ |
H A D | bdinfo.c | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/common/ |
H A D | board_f.c | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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H A D | image.c | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/include/ |
H A D | image.h | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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/openbmc/u-boot/ |
H A D | MAINTAINERS | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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H A D | Makefile | de5e5cea022ab44006ff1edf45a39f0943fb9dff Wed Aug 10 10:36:43 CDT 2016 Chris Zankel <chris@zankel.net> xtensa: add support for the xtensa processor architecture [1/2]
The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Cadence.
This is the first part of the basic architecture port with changes to common files. The 'arch/xtensa' directory, and boards and additional drivers will be in separate commits.
Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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