Searched hist:dc2a070d (Results 1 – 5 of 5) sorted by relevance
/openbmc/qemu/include/hw/misc/ |
H A D | allwinner-r40-ccu.h | dc2a070d Tue Jun 06 04:19:31 CDT 2023 qianfan Zhao <qianfanguijin@163.com> hw/arm/allwinner-r40: add Clock Control Unit
The CCU provides the registers to program the PLLs and the controls most of the clock generation, division, distribution, synchronization and gating.
This commit adds support for the Clock Control Unit which emulates a simple read/write register interface.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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/openbmc/qemu/hw/misc/ |
H A D | allwinner-r40-ccu.c | dc2a070d Tue Jun 06 04:19:31 CDT 2023 qianfan Zhao <qianfanguijin@163.com> hw/arm/allwinner-r40: add Clock Control Unit
The CCU provides the registers to program the PLLs and the controls most of the clock generation, division, distribution, synchronization and gating.
This commit adds support for the Clock Control Unit which emulates a simple read/write register interface.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | meson.build | dc2a070d Tue Jun 06 04:19:31 CDT 2023 qianfan Zhao <qianfanguijin@163.com> hw/arm/allwinner-r40: add Clock Control Unit
The CCU provides the registers to program the PLLs and the controls most of the clock generation, division, distribution, synchronization and gating.
This commit adds support for the Clock Control Unit which emulates a simple read/write register interface.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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/openbmc/qemu/include/hw/arm/ |
H A D | allwinner-r40.h | dc2a070d Tue Jun 06 04:19:31 CDT 2023 qianfan Zhao <qianfanguijin@163.com> hw/arm/allwinner-r40: add Clock Control Unit
The CCU provides the registers to program the PLLs and the controls most of the clock generation, division, distribution, synchronization and gating.
This commit adds support for the Clock Control Unit which emulates a simple read/write register interface.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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/openbmc/qemu/hw/arm/ |
H A D | allwinner-r40.c | dc2a070d Tue Jun 06 04:19:31 CDT 2023 qianfan Zhao <qianfanguijin@163.com> hw/arm/allwinner-r40: add Clock Control Unit
The CCU provides the registers to program the PLLs and the controls most of the clock generation, division, distribution, synchronization and gating.
This commit adds support for the Clock Control Unit which emulates a simple read/write register interface.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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