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/openbmc/linux/drivers/char/tpm/ |
H A D | tpm_tis_synquacer.c | d5ae56a4 Mon Jul 27 22:14:31 CDT 2020 Masahisa Kojima <masahisa.kojima@linaro.org> tpm: tis: add support for MMIO TPM on SynQuacer
When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO window that is backed by the SPI command sequencer in the SPI bus controller. This arrangement has the limitation that only byte size accesses are supported, and so we'll need to provide a separate module that take this into account.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> d5ae56a4 Mon Jul 27 22:14:31 CDT 2020 Masahisa Kojima <masahisa.kojima@linaro.org> tpm: tis: add support for MMIO TPM on SynQuacer When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO window that is backed by the SPI command sequencer in the SPI bus controller. This arrangement has the limitation that only byte size accesses are supported, and so we'll need to provide a separate module that take this into account. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
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H A D | Makefile | d5ae56a4 Mon Jul 27 22:14:31 CDT 2020 Masahisa Kojima <masahisa.kojima@linaro.org> tpm: tis: add support for MMIO TPM on SynQuacer
When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO window that is backed by the SPI command sequencer in the SPI bus controller. This arrangement has the limitation that only byte size accesses are supported, and so we'll need to provide a separate module that take this into account.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> d5ae56a4 Mon Jul 27 22:14:31 CDT 2020 Masahisa Kojima <masahisa.kojima@linaro.org> tpm: tis: add support for MMIO TPM on SynQuacer When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO window that is backed by the SPI command sequencer in the SPI bus controller. This arrangement has the limitation that only byte size accesses are supported, and so we'll need to provide a separate module that take this into account. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
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H A D | Kconfig | d5ae56a4 Mon Jul 27 22:14:31 CDT 2020 Masahisa Kojima <masahisa.kojima@linaro.org> tpm: tis: add support for MMIO TPM on SynQuacer
When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO window that is backed by the SPI command sequencer in the SPI bus controller. This arrangement has the limitation that only byte size accesses are supported, and so we'll need to provide a separate module that take this into account.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> d5ae56a4 Mon Jul 27 22:14:31 CDT 2020 Masahisa Kojima <masahisa.kojima@linaro.org> tpm: tis: add support for MMIO TPM on SynQuacer When fitted, the SynQuacer platform exposes its SPI TPM via a MMIO window that is backed by the SPI command sequencer in the SPI bus controller. This arrangement has the limitation that only byte size accesses are supported, and so we'll need to provide a separate module that take this into account. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
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