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| H A D | spi-rzv2m-csi.c | d5737d12 Tue Jul 18 14:24:50 CDT 2023 Fabrizio Castro <fabrizio.castro.jz@renesas.com> spi: rzv2m-csi: Squash timing settings into one statement
Register CLKSEL hosts the configuration for both clock polarity
and data phase, and both values can be set in one write operation.
Squash the clock polarity and data phase register writes into
one statement, for efficiency.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230718192453.543549-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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