Searched hist:d4e61f50 (Results 1 – 3 of 3) sorted by relevance
/openbmc/u-boot/doc/device-tree-bindings/misc/ |
H A D | intel,irq-router.txt | d4e61f50 Sat May 07 09:46:14 CDT 2016 Bin Meng <bmeng.cn@gmail.com> x86: irq: Enable SCI on IRQ9 By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
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/openbmc/u-boot/arch/x86/include/asm/ |
H A D | irq.h | d4e61f50 Sat May 07 09:46:14 CDT 2016 Bin Meng <bmeng.cn@gmail.com> x86: irq: Enable SCI on IRQ9 By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
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/openbmc/u-boot/arch/x86/cpu/ |
H A D | irq.c | d4e61f50 Sat May 07 09:46:14 CDT 2016 Bin Meng <bmeng.cn@gmail.com> x86: irq: Enable SCI on IRQ9 By default SCI is disabled after power on. ACTL is the register to enable SCI and route it to PIC/APIC. To support both ACPI in PIC mode and APIC mode, configure SCI to use IRQ9. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
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