Searched hist:d0fb47a5 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/spi/ |
| H A D | fsl-spi.txt | d0fb47a5 Wed Apr 16 15:09:39 CDT 2014 Jane Wan <Jane.Wan@gainspeed.com> spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT
Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers
(n=0,1,2,3) configurable through device tree.
CSnBEF is the chip select setup time. It's the delay in bits from the
activation of chip select pin to the first clock for data frame.
CSnAFT is the chip select hold time. It's the delay in bits from the
last clock for data frame to the deactivation of chip select pin.
The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set
them to a different value for some device.
Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
d0fb47a5 Wed Apr 16 15:09:39 CDT 2014 Jane Wan <Jane.Wan@gainspeed.com> spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT
Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers
(n=0,1,2,3) configurable through device tree.
CSnBEF is the chip select setup time. It's the delay in bits from the
activation of chip select pin to the first clock for data frame.
CSnAFT is the chip select hold time. It's the delay in bits from the
last clock for data frame to the deactivation of chip select pin.
The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set
them to a different value for some device.
Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|
| /openbmc/linux/drivers/spi/ |
| H A D | spi-fsl-espi.c | d0fb47a5 Wed Apr 16 15:09:39 CDT 2014 Jane Wan <Jane.Wan@gainspeed.com> spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT
Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers
(n=0,1,2,3) configurable through device tree.
CSnBEF is the chip select setup time. It's the delay in bits from the
activation of chip select pin to the first clock for data frame.
CSnAFT is the chip select hold time. It's the delay in bits from the
last clock for data frame to the deactivation of chip select pin.
The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set
them to a different value for some device.
Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
d0fb47a5 Wed Apr 16 15:09:39 CDT 2014 Jane Wan <Jane.Wan@gainspeed.com> spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT
Make FSL eSPI CSnBEF and CSnAFT fields in ESPI_SPMODEn registers
(n=0,1,2,3) configurable through device tree.
CSnBEF is the chip select setup time. It's the delay in bits from the
activation of chip select pin to the first clock for data frame.
CSnAFT is the chip select hold time. It's the delay in bits from the
last clock for data frame to the deactivation of chip select pin.
The FSL eSPI driver hardcodes CSnBEF and CSnAFT to 0. Need to set
them to a different value for some device.
Signed-off-by: Jane Wan <Jane.Wan@gainspeed.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
|