Searched hist:d0f1a853 (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/amdkfd/ |
H A D | cwsr_trap_handler_gfx10.asm | d0f1a853 Wed Nov 20 16:13:03 CST 2019 Jay Cornwall <jay.cornwall@amd.com> drm/amdkfd: Support newer assemblers in gfx10 trap handler
The contents of macros are parsed by the assembler before conditions have been tested. This causes assembly errors when using IP-specific instructions in the IP-unified trap handler.
Add a preprocessing step to filter IP-specific code.
Also guard a Navi1x-specific instruction (no effect on Sienna_Cichlid).
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> d0f1a853 Wed Nov 20 16:13:03 CST 2019 Jay Cornwall <jay.cornwall@amd.com> drm/amdkfd: Support newer assemblers in gfx10 trap handler The contents of macros are parsed by the assembler before conditions have been tested. This causes assembly errors when using IP-specific instructions in the IP-unified trap handler. Add a preprocessing step to filter IP-specific code. Also guard a Navi1x-specific instruction (no effect on Sienna_Cichlid). Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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H A D | cwsr_trap_handler.h | d0f1a853 Wed Nov 20 16:13:03 CST 2019 Jay Cornwall <jay.cornwall@amd.com> drm/amdkfd: Support newer assemblers in gfx10 trap handler
The contents of macros are parsed by the assembler before conditions have been tested. This causes assembly errors when using IP-specific instructions in the IP-unified trap handler.
Add a preprocessing step to filter IP-specific code.
Also guard a Navi1x-specific instruction (no effect on Sienna_Cichlid).
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> d0f1a853 Wed Nov 20 16:13:03 CST 2019 Jay Cornwall <jay.cornwall@amd.com> drm/amdkfd: Support newer assemblers in gfx10 trap handler The contents of macros are parsed by the assembler before conditions have been tested. This causes assembly errors when using IP-specific instructions in the IP-unified trap handler. Add a preprocessing step to filter IP-specific code. Also guard a Navi1x-specific instruction (no effect on Sienna_Cichlid). Signed-off-by: Jay Cornwall <jay.cornwall@amd.com> Reviewed-by: Yong Zhao <Yong.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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