Searched hist:c4b4b732 (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/drivers/dma/ |
H A D | mv_xor.h | c4b4b732 Thu Nov 22 11:16:37 CST 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> dma: mv_xor: clear the window override control registers
The XOR channels on Marvell SoCs have a Window Override Control register that allow to do some fancy things with addresses. Those features are not used by the driver, but some U-Boot versions anyway modify those registers.
For some reason, the U-Boot on OpenBlocks AX3-4 was setting an invalid value in those registers when the addition 2 GB DRAM chip was plugged into the board, causing the XOR driver to fail in using the XOR engines.
By setting those registers to 0 during the driver initialization, we ensure that the registers are configured according with the driver operation model.
Thanks to Lior Amsalem <alior@marvell.com> for his help in debugging this problem.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> c4b4b732 Thu Nov 22 11:16:37 CST 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> dma: mv_xor: clear the window override control registers The XOR channels on Marvell SoCs have a Window Override Control register that allow to do some fancy things with addresses. Those features are not used by the driver, but some U-Boot versions anyway modify those registers. For some reason, the U-Boot on OpenBlocks AX3-4 was setting an invalid value in those registers when the addition 2 GB DRAM chip was plugged into the board, causing the XOR driver to fail in using the XOR engines. By setting those registers to 0 during the driver initialization, we ensure that the registers are configured according with the driver operation model. Thanks to Lior Amsalem <alior@marvell.com> for his help in debugging this problem. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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H A D | mv_xor.c | c4b4b732 Thu Nov 22 11:16:37 CST 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> dma: mv_xor: clear the window override control registers
The XOR channels on Marvell SoCs have a Window Override Control register that allow to do some fancy things with addresses. Those features are not used by the driver, but some U-Boot versions anyway modify those registers.
For some reason, the U-Boot on OpenBlocks AX3-4 was setting an invalid value in those registers when the addition 2 GB DRAM chip was plugged into the board, causing the XOR driver to fail in using the XOR engines.
By setting those registers to 0 during the driver initialization, we ensure that the registers are configured according with the driver operation model.
Thanks to Lior Amsalem <alior@marvell.com> for his help in debugging this problem.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> c4b4b732 Thu Nov 22 11:16:37 CST 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> dma: mv_xor: clear the window override control registers The XOR channels on Marvell SoCs have a Window Override Control register that allow to do some fancy things with addresses. Those features are not used by the driver, but some U-Boot versions anyway modify those registers. For some reason, the U-Boot on OpenBlocks AX3-4 was setting an invalid value in those registers when the addition 2 GB DRAM chip was plugged into the board, causing the XOR driver to fail in using the XOR engines. By setting those registers to 0 during the driver initialization, we ensure that the registers are configured according with the driver operation model. Thanks to Lior Amsalem <alior@marvell.com> for his help in debugging this problem. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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