Searched hist:c233f597 (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/arch/powerpc/net/ |
H A D | bpf_jit.h | c233f597 Wed Feb 08 02:57:29 CST 2017 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> powerpc/bpf: Introduce __PPC_SH64()
Introduce __PPC_SH64() as a 64-bit variant to encode shift field in some of the shift and rotate instructions operating on double-words. Convert some of the BPF instruction macros to use the same.
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> c233f597 Wed Feb 08 02:57:29 CST 2017 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> powerpc/bpf: Introduce __PPC_SH64() Introduce __PPC_SH64() as a 64-bit variant to encode shift field in some of the shift and rotate instructions operating on double-words. Convert some of the BPF instruction macros to use the same. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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/openbmc/linux/arch/powerpc/include/asm/ |
H A D | ppc-opcode.h | c233f597 Wed Feb 08 02:57:29 CST 2017 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> powerpc/bpf: Introduce __PPC_SH64()
Introduce __PPC_SH64() as a 64-bit variant to encode shift field in some of the shift and rotate instructions operating on double-words. Convert some of the BPF instruction macros to use the same.
Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> c233f597 Wed Feb 08 02:57:29 CST 2017 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> powerpc/bpf: Introduce __PPC_SH64() Introduce __PPC_SH64() as a 64-bit variant to encode shift field in some of the shift and rotate instructions operating on double-words. Convert some of the BPF instruction macros to use the same. Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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