Searched hist:b9dd6ff9 (Results 1 – 6 of 6) sorted by relevance
/openbmc/qemu/tests/tcg/hexagon/ |
H A D | overflow.c | b9dd6ff9 Mon Oct 04 19:12:31 CDT 2021 Taylor Simpson <tsimpson@quicinc.com> Hexagon (target/hexagon) put writes to USR into temp until commit
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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H A D | Makefile.target | b9dd6ff9 Mon Oct 04 19:12:31 CDT 2021 Taylor Simpson <tsimpson@quicinc.com> Hexagon (target/hexagon) put writes to USR into temp until commit
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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/openbmc/qemu/target/hexagon/ |
H A D | attribs_def.h.inc | b9dd6ff9 Mon Oct 04 19:12:31 CDT 2021 Taylor Simpson <tsimpson@quicinc.com> Hexagon (target/hexagon) put writes to USR into temp until commit
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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H A D | hex_common.py | b9dd6ff9 Mon Oct 04 19:12:31 CDT 2021 Taylor Simpson <tsimpson@quicinc.com> Hexagon (target/hexagon) put writes to USR into temp until commit
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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H A D | translate.c | b9dd6ff9 Mon Oct 04 19:12:31 CDT 2021 Taylor Simpson <tsimpson@quicinc.com> Hexagon (target/hexagon) put writes to USR into temp until commit
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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H A D | macros.h | b9dd6ff9 Mon Oct 04 19:12:31 CDT 2021 Taylor Simpson <tsimpson@quicinc.com> Hexagon (target/hexagon) put writes to USR into temp until commit
Change SET_USR_FIELD to write to hex_new_value[HEX_REG_USR] instead of hex_gpr[HEX_REG_USR].
Then, we need code to mark the instructions that can set implicitly set USR - Macros added to hex_common.py - A_FPOP added in translate.c
Test case added in tests/tcg/hexagon/overflow.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
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