Searched hist:b71eec31 (Results 1 – 5 of 5) sorted by relevance
| /openbmc/u-boot/board/intel/crownbay/ |
| H A D | crownbay.c | b71eec31 Wed Dec 17 01:50:38 CST 2014 Bin Meng <bmeng.cn@gmail.com> x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/board/coreboot/coreboot/ |
| H A D | coreboot.c | b71eec31 Wed Dec 17 01:50:38 CST 2014 Bin Meng <bmeng.cn@gmail.com> x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/board/google/chromebook_link/ |
| H A D | link.c | b71eec31 Wed Dec 17 01:50:38 CST 2014 Bin Meng <bmeng.cn@gmail.com> x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/arch/x86/include/asm/ |
| H A D | gpio.h | b71eec31 Wed Dec 17 01:50:38 CST 2014 Bin Meng <bmeng.cn@gmail.com> x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /openbmc/u-boot/drivers/gpio/ |
| H A D | intel_ich6_gpio.c | b71eec31 Wed Dec 17 01:50:38 CST 2014 Bin Meng <bmeng.cn@gmail.com> x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|