Searched hist:b6c81be9 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/pci/ |
| H A D | ti,j721e-pci-ep.yaml | b6c81be9 Thu Dec 10 06:49:14 CST 2020 Kishon Vijay Abraham I <kishon@ti.com> dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument
Fix binding documentation of "ti,syscon-pcie-ctrl" to take phandle with
argument. The argument is the register offset within "syscon" used to
configure PCIe controller. This change is as discussed in [1]
[1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com
Link: https://lore.kernel.org/r/20201210124917.24185-2-kishon@ti.com
Fixes: 431b53b81cdc ("dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC")
Fixes: 45b39e928966 ("dt-bindings: PCI: Add EP mode dt-bindings for TI's J721E SoC")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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| H A D | ti,j721e-pci-host.yaml | b6c81be9 Thu Dec 10 06:49:14 CST 2020 Kishon Vijay Abraham I <kishon@ti.com> dt-bindings: pci: ti,j721e: Fix "ti,syscon-pcie-ctrl" to take argument
Fix binding documentation of "ti,syscon-pcie-ctrl" to take phandle with
argument. The argument is the register offset within "syscon" used to
configure PCIe controller. This change is as discussed in [1]
[1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com
Link: https://lore.kernel.org/r/20201210124917.24185-2-kishon@ti.com
Fixes: 431b53b81cdc ("dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC")
Fixes: 45b39e928966 ("dt-bindings: PCI: Add EP mode dt-bindings for TI's J721E SoC")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
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