Searched hist:b4d56e0c (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
H A D | dcn301_dccg.c | b4d56e0c Thu May 06 13:51:20 CDT 2021 Wesley Chalmers <Wesley.Chalmers@amd.com> drm/amd/display: Add Interface to set FIFO ERRDET SW Override
[WHY] HW has handed down a new sequence which requires access to the FIFO ERRDET SW Override register.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
H A D | dcn30_dccg.c | b4d56e0c Thu May 06 13:51:20 CDT 2021 Wesley Chalmers <Wesley.Chalmers@amd.com> drm/amd/display: Add Interface to set FIFO ERRDET SW Override
[WHY] HW has handed down a new sequence which requires access to the FIFO ERRDET SW Override register.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_dccg.c | b4d56e0c Thu May 06 13:51:20 CDT 2021 Wesley Chalmers <Wesley.Chalmers@amd.com> drm/amd/display: Add Interface to set FIFO ERRDET SW Override
[WHY] HW has handed down a new sequence which requires access to the FIFO ERRDET SW Override register.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dccg.c | b4d56e0c Thu May 06 13:51:20 CDT 2021 Wesley Chalmers <Wesley.Chalmers@amd.com> drm/amd/display: Add Interface to set FIFO ERRDET SW Override
[WHY] HW has handed down a new sequence which requires access to the FIFO ERRDET SW Override register.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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H A D | dcn20_dccg.h | b4d56e0c Thu May 06 13:51:20 CDT 2021 Wesley Chalmers <Wesley.Chalmers@amd.com> drm/amd/display: Add Interface to set FIFO ERRDET SW Override
[WHY] HW has handed down a new sequence which requires access to the FIFO ERRDET SW Override register.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
H A D | dccg.h | b4d56e0c Thu May 06 13:51:20 CDT 2021 Wesley Chalmers <Wesley.Chalmers@amd.com> drm/amd/display: Add Interface to set FIFO ERRDET SW Override
[WHY] HW has handed down a new sequence which requires access to the FIFO ERRDET SW Override register.
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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