Searched hist:b0f89cf5 (Results 1 – 2 of 2) sorted by relevance
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H A D | zynqmp-clk-ccf.dtsi | b0f89cf5 Thu Jan 21 06:36:06 CST 2021 Michal Simek <michal.simek@xilinx.com> arm64: dts: zynqmp: Add DisplayPort subsystem
Add a DT node for the DisplayPort subsystem, a hard IP present in the Zynq Ultrascale+ MPSoC.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/4d978aef852cacdfb35aa8e50d648a787e73b90c.1611232558.git.michal.simek@xilinx.com
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H A D | zynqmp.dtsi | b0f89cf5 Thu Jan 21 06:36:06 CST 2021 Michal Simek <michal.simek@xilinx.com> arm64: dts: zynqmp: Add DisplayPort subsystem
Add a DT node for the DisplayPort subsystem, a hard IP present in the Zynq Ultrascale+ MPSoC.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/4d978aef852cacdfb35aa8e50d648a787e73b90c.1611232558.git.michal.simek@xilinx.com
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