Searched hist:afcd5df5 (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/target/arm/tcg/ |
H A D | a64.decode | afcd5df5 Mon Jun 19 05:20:20 CDT 2023 Peter Maydell <peter.maydell@linaro.org> target/arm: Convert barrier insns to decodetree
Convert the insns in the "Barriers" instruction class to decodetree: CLREX, DSB, DMB, ISB and SB.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230602155223.2040685-4-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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H A D | translate-a64.c | afcd5df5 Mon Jun 19 05:20:20 CDT 2023 Peter Maydell <peter.maydell@linaro.org> target/arm: Convert barrier insns to decodetree
Convert the insns in the "Barriers" instruction class to decodetree: CLREX, DSB, DMB, ISB and SB.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230602155223.2040685-4-peter.maydell@linaro.org Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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