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H A D | clk-pfdv2.c | ae8a10d6 Tue Sep 14 01:52:05 CDT 2021 Jacky Bai <ping.bai@nxp.com> clk: imx: disable the pfd when set pfdv2 clock rate
It is possible that a PFD is enabled in HW but not in SW. That means the enable count & prepare count of the PFD clock is '0', so the 'CLK_SET_RATE' flag can do nothing when the rate is changed while the PFD is hw enabled. In order to safely change the pfd rate, we can disable the PFD directly if it is hw enabled but not used by SW end user.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20210914065208.3582128-7-ping.bai@nxp.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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