Searched hist:ab9056ff9bdb3f95db6e7a666d10522d289f14ec (Results 1 – 4 of 4) sorted by relevance
| /openbmc/qemu/gdb-xml/ |
| H A D | riscv-32bit-virtual.xml | ab9056ff9bdb3f95db6e7a666d10522d289f14ec Mon Oct 14 10:45:28 CDT 2019 Jonathan Behrens <jonathan@fintelia.io> target/riscv: Expose "priv" register for GDB for reads
This patch enables a debugger to read the current privilege level via a virtual
"priv" register. When compiled with CONFIG_USER_ONLY the register is still
visible but always reports the value zero.
Signed-off-by: Jonathan Behrens <jonathan@fintelia.io>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
|
| H A D | riscv-64bit-virtual.xml | ab9056ff9bdb3f95db6e7a666d10522d289f14ec Mon Oct 14 10:45:28 CDT 2019 Jonathan Behrens <jonathan@fintelia.io> target/riscv: Expose "priv" register for GDB for reads
This patch enables a debugger to read the current privilege level via a virtual
"priv" register. When compiled with CONFIG_USER_ONLY the register is still
visible but always reports the value zero.
Signed-off-by: Jonathan Behrens <jonathan@fintelia.io>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
|
| /openbmc/qemu/target/riscv/ |
| H A D | gdbstub.c | ab9056ff9bdb3f95db6e7a666d10522d289f14ec Mon Oct 14 10:45:28 CDT 2019 Jonathan Behrens <jonathan@fintelia.io> target/riscv: Expose "priv" register for GDB for reads
This patch enables a debugger to read the current privilege level via a virtual
"priv" register. When compiled with CONFIG_USER_ONLY the register is still
visible but always reports the value zero.
Signed-off-by: Jonathan Behrens <jonathan@fintelia.io>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
|
| /openbmc/qemu/ |
| H A D | configure | ab9056ff9bdb3f95db6e7a666d10522d289f14ec Mon Oct 14 10:45:28 CDT 2019 Jonathan Behrens <jonathan@fintelia.io> target/riscv: Expose "priv" register for GDB for reads
This patch enables a debugger to read the current privilege level via a virtual
"priv" register. When compiled with CONFIG_USER_ONLY the register is still
visible but always reports the value zero.
Signed-off-by: Jonathan Behrens <jonathan@fintelia.io>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
|