Searched hist:ab65e04d (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/drivers/clk/sunxi-ng/ |
H A D | ccu-sun8i-v3s.c | ab65e04d Thu Feb 28 14:03:27 CST 2019 Jernej Skrabec <jernej.skrabec@siol.net> clk: sunxi-ng: Allow DE clock to set parent rate
DE2/DE3 mixers have to run at specific frequency in order to work optimally. This wasn't actually possible for some SoCs because "de" clock wasn't allowed to adjust parent rate.
Add CLK_SET_RATE_PARENT flag to all "de" clocks which didn't have it yet.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> ab65e04d Thu Feb 28 14:03:27 CST 2019 Jernej Skrabec <jernej.skrabec@siol.net> clk: sunxi-ng: Allow DE clock to set parent rate DE2/DE3 mixers have to run at specific frequency in order to work optimally. This wasn't actually possible for some SoCs because "de" clock wasn't allowed to adjust parent rate. Add CLK_SET_RATE_PARENT flag to all "de" clocks which didn't have it yet. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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H A D | ccu-sun50i-h6.c | ab65e04d Thu Feb 28 14:03:27 CST 2019 Jernej Skrabec <jernej.skrabec@siol.net> clk: sunxi-ng: Allow DE clock to set parent rate
DE2/DE3 mixers have to run at specific frequency in order to work optimally. This wasn't actually possible for some SoCs because "de" clock wasn't allowed to adjust parent rate.
Add CLK_SET_RATE_PARENT flag to all "de" clocks which didn't have it yet.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> ab65e04d Thu Feb 28 14:03:27 CST 2019 Jernej Skrabec <jernej.skrabec@siol.net> clk: sunxi-ng: Allow DE clock to set parent rate DE2/DE3 mixers have to run at specific frequency in order to work optimally. This wasn't actually possible for some SoCs because "de" clock wasn't allowed to adjust parent rate. Add CLK_SET_RATE_PARENT flag to all "de" clocks which didn't have it yet. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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H A D | ccu-sun50i-a64.c | ab65e04d Thu Feb 28 14:03:27 CST 2019 Jernej Skrabec <jernej.skrabec@siol.net> clk: sunxi-ng: Allow DE clock to set parent rate
DE2/DE3 mixers have to run at specific frequency in order to work optimally. This wasn't actually possible for some SoCs because "de" clock wasn't allowed to adjust parent rate.
Add CLK_SET_RATE_PARENT flag to all "de" clocks which didn't have it yet.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> ab65e04d Thu Feb 28 14:03:27 CST 2019 Jernej Skrabec <jernej.skrabec@siol.net> clk: sunxi-ng: Allow DE clock to set parent rate DE2/DE3 mixers have to run at specific frequency in order to work optimally. This wasn't actually possible for some SoCs because "de" clock wasn't allowed to adjust parent rate. Add CLK_SET_RATE_PARENT flag to all "de" clocks which didn't have it yet. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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