Searched hist:a92a5d0d (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/arc/boot/dts/ |
| H A D | nsimosci.dts | a92a5d0d Thu Apr 18 04:40:39 CDT 2013 Mischa Jonker <mjonker@synopsys.com> ARC: Add support for nSIM OSCI System C model
This adds support for an ARC Virtual Platform. This platform is based on the
System C standard promoted by the OSCI (Open System C Initiative) and uses
nSIM to simulate the ARC CPU core itself.
Users can build a virtual SoC by combining System C models of peripherals
and CPU cores.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
a92a5d0d Thu Apr 18 04:40:39 CDT 2013 Mischa Jonker <mjonker@synopsys.com> ARC: Add support for nSIM OSCI System C model
This adds support for an ARC Virtual Platform. This platform is based on the
System C standard promoted by the OSCI (Open System C Initiative) and uses
nSIM to simulate the ARC CPU core itself.
Users can build a virtual SoC by combining System C models of peripherals
and CPU cores.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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| /openbmc/linux/arch/arc/configs/ |
| H A D | nsimosci_defconfig | a92a5d0d Thu Apr 18 04:40:39 CDT 2013 Mischa Jonker <mjonker@synopsys.com> ARC: Add support for nSIM OSCI System C model
This adds support for an ARC Virtual Platform. This platform is based on the
System C standard promoted by the OSCI (Open System C Initiative) and uses
nSIM to simulate the ARC CPU core itself.
Users can build a virtual SoC by combining System C models of peripherals
and CPU cores.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
a92a5d0d Thu Apr 18 04:40:39 CDT 2013 Mischa Jonker <mjonker@synopsys.com> ARC: Add support for nSIM OSCI System C model
This adds support for an ARC Virtual Platform. This platform is based on the
System C standard promoted by the OSCI (Open System C Initiative) and uses
nSIM to simulate the ARC CPU core itself.
Users can build a virtual SoC by combining System C models of peripherals
and CPU cores.
Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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